HD74HC109RPEL データシートの表示（PDF） - Renesas Electronics

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HD74HC109RPEL

Dual J-KFlip-Flops (with Preset and Clear)

Renesas Electronics 

HD74HC109

Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)

Item

Setup time

Hold time

Pulse width

Output rise/fall

time

Input capacitance

Symbol VCC (V)

tsu

2.0

4.5

6.0

th

2.0

4.5

6.0

tw

2.0

4.5

6.0

tTLH, tTHL 2.0

4.5

6.0

Cin

—

Ta = 25°C

Ta = –40 to +85°C

Min Typ Max Min Max Unit

Test Conditions

100 — — 125

— ns Data to Latch Enable

20 4 —

25

—

17 — —

21

—

0 ——

0

— ns Latch Enable to Data

0 –4 —

0

—

0 ——

0

—

80 — — 100

— ns Latch Enable

16 5 —

20

—

14 — —

17

—

— — 75

—

95 ns

— 5 15

—

19

— — 13

—

16

— 5 10

—

10 pF

Test Circuit

VCC

VCC

Input

Pulse generator

Zout = 50 Ω

Input

Pulse generator

Zout = 50 Ω

Preset

Output

J

Clock

Q

Output

CL = 50 pF

K

Q

Clear

CL = 50 pF

Note: CL includes the probe and jig capacitance.

Rev.2.00, Oct 11, 2005 page 4 of 7

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