HD74HC165P データシートの表示（PDF） - Renesas Electronics
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HD74HC165P Datasheet PDF : 8 Pages
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HD74HC165
Clock Inhibit
(Clock)
50%
VCC
(See notes 3)
Clock
(Clock Inhibit)
t rem
50% 50% 50%
GND
VCC
t su
t w (clock)
F, H
(See notes
1 and 2)
50% 50%
50%
50%
t su t h
tw(load) t h
t w (load)
Shift / Load
QH
QH
90%
90%
50%
10%
6ns
t PHL
t PLH
50%
10%
6ns
t PHL
50%
90%
50%
10%
t THL
t PLH
90%
50%
10%
t TLH
t PHL
t PLH
90%
50%
10%
90%
50%
10%
50%
t TLH
t THL
50% 50%
t PLH
t PHL
t PHL
t PLH
50%
50%
t PLH
GND
VCC
GND
VCC
GND
VOH
t PHL
50%
VOL
VOH
VOL
Notes 1. The remaining six data inputs and the serial input are low.
2. Prior to test, high-level data is loaded into H input.
3. Disable while clock is high.
4. Input pulse : PRR ≤ 1MHz, duty cycle 50%
Rev.3.00, Jan 31, 2006 page 6 of 7
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