HD74HC175TELL データシートの表示（PDF） - Renesas Electronics
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HD74HC175TELL Datasheet PDF : 7 Pages
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HD74HC175
Quad. D-type Flip-Flops (with Clear)
REJ03D0585-0300
Rev.3.00
Jan 31, 2006
Description
Information at the D inputs of the HD74HC175 is transferred to the Q and Q outputs on the positive going edge of the
clock pulse. Both true and compliment outputs from each flip-flop are externally available. All four flip-flops are
controlled by a common clock and a common clear. Clearing is accomplished by a negative pulse at the clear input.
All four Q outputs are cleared to a logic low level and all four Q outputs to a logic high level.
Features
• High Speed Operation: tpd (Clock to Q) = 14 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC175P
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
HD74HC175TELL TSSOP-16 pin
PTSP0016JB-A
T
(TTP-16DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
ELL (2,000 pcs/reel)
Function Table
Inputs
Clear
Clock
D
L
X
X
H
H
H
L
H
L
X
H : High level
L : Low level
X : Irrelevant
Output
Q
Q
L
H
H
L
L
H
no change
Rev.3.00, Jan 31, 2006 page 1 of 6
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