HD74LVC540AFPEL データシートの表示（PDF） - Renesas Electronics
部品番号
コンポーネント説明
メーカー
HD74LVC540AFPEL Datasheet PDF : 7 Pages
| |||
HD74LVC540A
Octal Buffers / Line Drivers with 3-state Outputs
REJ03D0358–0400Z
(Previous ADE-205-114B (Z))
Rev.4.00
Jul. 28, 2004
Description
The HD74LVC540A has eight inverter drivers with three state outputs in a 20 pin package. When G1 and G2 is low
level, this drivers set up output is enable. Low voltage and high-speed operation is suitable at the battery drive product
(note type personal computer) and low power consumption extends the life of a battery for long time operation.
Features
• VCC = 2.0 V to 5.5 V
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@VCC = 3.0 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
HD74LVC540AFPEL
SOP–20 pin (JEITA) FP–20DAV
HD74LVC540ATELL
TSSOP–20 pin
TTP–20DAV
Note: Please consult the sales office for the above package availability.
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
G1
G2
A
L
L
L
L
L
H
H
X
X
X
H
X
H: High level
L: Low level
X: Immaterial
Z: High impedance
Output Y
H
L
Z
Z
Rev.4.00 Jul. 28, 2004 page 1 of 6
Share Link: 