HDMP-1637A データシートの表示（PDF） - HP => Agilent Technologies

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HDMP-1637A

Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs

HP => Agilent Technologies 

10

I/O Type Definitions

I/O Type

I-TTL

O-TTL

HS_OUT

HS_IN

C

S

PECL

Definition

Input TTL, Floats High When Left Open

Output TTL

High Speed Output, ECL Compatible

High Speed Input

External Circuit Node

Power Supply or Ground

Positive ECL

HDMP-1637A (TRx) Pin Input Capacitance

Symbol

CINPUT

Parameter

Input Capacitance on TTL Input Pins

Units

pF

VCC_TTL

O_TTL

I_TTL

VCC_TTL

VCC

Typ.

1.6

Max.

GND_TTL

ESD

PROTECTION

GND

ESD

PROTECTION

GND_TTL

VBB 1.4 V

Figure 9. O-TTL and I-TTL Simplified Circuit Schematic.

HS_OUT

Zo

Zo

VCC_TXHS

VCC_TXECL

VCC

HS_IN

VCC

VCC

+

–

A

+

–

R

R

+DOUT

Zo = 50 Ω 0.01 µF +DIN

Zo

RPAD

150

2*Z0 = 100 Ω

ESD

PROTECTION

-DOUT

GND

150

RPAD

Zo

Zo = 50 Ω

0.01 µF -DIN

GND

ESD

PROTECTION

GND_TXHS

GND

NOTES:

1. HS_IN INPUTS SHOULD NEVER BE CONNECTED TO GROUND AS PERMANENT DAMAGE TO THE DEVICE MAY RESULT.

2. THE OPTIONAL SERIES PADDING RESISTORS (RPAD) HELP DAMPEN LOAD REFLECTIONS. TYPICAL RPAD VALUES FOR

MISMATCHED LOADS RANGE BETWEEN 25-Z0 Ω.

3. FOR PECL REFCLK INPUT PAIR, THE CONSTANT VOLTAGE SUPPLIES (SHOWN AS A) AND RESISTORS R ARE OMITTED.

Figure 10. HS_OUT and HS_IN Simplified Circuit Schematic.

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