HEF4046BDB データシートの表示（PDF） - Philips Electronics

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HEF4046BDB

Phase-locked loop

Philips Electronics 

Philips Semiconductors

Phase-locked loop

Product specification

HEF4046B

MSI

Figure 6 shows the state diagram for phase comparator 2.

Each circle represents a state of the comparator. The

number at the top, inside each circle, represents the state

of the comparator, while the logic state of the signal and

comparator inputs are represented by a ‘0’ for a logic LOW

or a ‘1’ for a logic HIGH, and they are shown in the left and

right bottom of each circle.

The transitions from one to another result from either a

logic change at the signal input (S) or the comparator input

(C). A positive-going and a negative-going transition are

shown by an arrow pointing up or down respectively.

The state diagram assumes, that only one transition on

either the signal input or comparator input occurs at any

instant. States 3, 5, 9 and 11 represent the condition at the

output when the p-type driver is ON, while states 2, 4, 10

and 12 determine the condition when the n-type driver is

ON. States 1, 6, 7 and 8 represent the condition when the

output is in its high impedance OFF state; i.e. both p and

n-type drivers are OFF, and the PCPOUT output is HIGH.

The condition at output PCPOUT for all other states is LOW.

S ↑: 0 to 1 transition at the signal input.

C ↓ : 1 to 0 transition at the comparator input.

Fig.6 State diagram for comparator 2.

January 1995

6

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