HEF4046BF データシートの表示（PDF） - Philips Electronics

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HEF4046BF

Phase-locked loop

Philips Electronics 

Philips Semiconductors

Phase-locked loop

Product specification

HEF4046B

MSI

VDD

V

SYMBOL

MIN.

TYP.

MAX.

VCO

Operating supply

voltage

Power dissipation

Maximum operating

frequency

Temperature/

frequency

stability

Linearity

Duty factor at

VCOOUT

Input resistance at

VCOIN

VDD

5

10 P

15

5

10 fmax

15

5

10

15

5

10

15

5

10

15

5

10 δ

15

5

10 RIN

15

3

15 V

5

15 V

150

µW

2500

µW

9000

µW

0,5

1,0

MHz

1,0

2,0

MHz

1,3

2,7

MHz

0,220,30

%/°C

0,040,05

%/°C

0,010,05

%/°C

00,22

%/°C

00,04

%/°C

00,01

%/°C

0,50

%

0,25

%

0,25

%

50

%

50

%

50

%

106

MΩ

106

MΩ

106

MΩ

Source follower

Offset voltage

5

VCOIN minus

10

SFOUT

15

5

10

15

Linearity

5

10

15

1,7

V

2,0

V

2,1

V

1,5

V

1,7

V

1,8

V

0,3

%

1,0

%

1,3

%

Zener diode

Zener voltage

VZ

Dynamic resistance

RZ

Notes

1. Over the recommended component range.

7,3

V

25

Ω

as fixed oscillator only

phase-locked loop operation

fo = 10 kHz; R1 = 1 MΩ;

R2 = ∞; VCOIN at 1⁄2 VDD;

see also Figs 10 and 11

VCOIN at VDD;

R1 = 10 kΩ; R2 = ∞;

C1 = 50 pF

no frequency offset

(fmin = 0);

see also note 1

with frequency offset

(fmin > 0);

see also note 1

R1 > 10 kΩ

R1 > 400 kΩ

R1 = 1 MΩ

see Fig.13

and Figs 14

15 and 16

RSF = 10 kΩ;

VCOIN at 1⁄2 VDD

RSF = 50 kΩ;

VCOIN at 1⁄2 VDD

RSF > 50 kΩ;

see Fig.13

IZ = 50 µA

IZ = 1 mA

January 1995

8

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