HEF4516B データシートの表示（PDF） - NXP Semiconductors.

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HEF4516B

Binary up/down counter

NXP Semiconductors. 

NXP Semiconductors

HEF4516B

Binary up/down counter

6. Pinning information

6.1 Pinning

Fig 3. Pin configuration

HEF4516B

PL 1

Q3 2

D3 3

D0 4

CE 5

Q0 6

TC 7

VSS 8

16 VDD

15 CP

14 Q2

13 D2

12 D1

11 Q1

10 UP/DN

9 MR

001aae689

6.2 Pin description

Table 2. Pin description

Symbol

Pin

PL

1

D0 to D3

4, 12, 13, 3

CE

5

Q0 to Q3

6, 11, 14, 2

VSS

8

TC

7

MR

9

UP/DN

10

CP

15

VDD

16

Description

parallel load input (active HIGH)

parallel input

count enable input (active LOW)

parallel output

ground supply voltage

terminal count output (active LOW)

master reset input

up/down count control input

clock pulse input (LOW to HIGH, edge triggered)

supply voltage

HEF4516B_6

Product data sheet

Rev. 06 — 11 December 2009

© NXP B.V. 2009. All rights reserved.

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