HI-574A(1997) データシートの表示（PDF） - Intersil

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HI-574A
(Rev.:1997)

Complete, 12-Bit A/D Converters with Microprocessor Interface

Intersil 

HI-574A, HI-674A, HI-774

Timing Specifications (HI-574A) 25oC, Note 2, Unless Otherwise Specified (Continued)

SYMBOL

PARAMETER

tHEC

tSSC

tHSC

tSRC

tHRC

tSAC

tHAC

tC

CE Pulse Width

CS to CE Setup

CS Low During CE High

R/C to CE Setup

R/C Low During CE High

AO to CE Setup

AO Valid During CE High

Conversion Time

READ MODE

12-Bit Cycle TMIN to TMAX

8-Bit Cycle TMIN to TMAX

tDD

tHD

tHL

tSSR

tSRR

tSAR

tHSR

tHRR

tHAR

tHS

Access Time from CE

Data Valid After CE Low

Output Float Delay

CS to CE Setup

R/C to CE Setup

AO to CE Setup

CS Valid After CE Low

R/C High After CE Low

AO Valid After CE Low

STS Delay After Data Valid

MIN

TYP

50

-

50

-

50

-

50

-

50

-

0

-

50

-

15

20

10

13

-

75

25

-

-

100

50

-

0

-

50

-

0

-

0

-

50

-

300

-

Timing Specifications (HI-674A) 25oC, Note 2, Unless Otherwise Specified

SYMBOL

PARAMETER

CONVERT MODE

tDSC

tHEC

tSSC

tHSC

tSRC

tHRC

tSAC

tHAC

tC

STS Delay from CE

CE Pulse Width

CS to CE Setup

CS Low During CE High

R/C to CE Setup

R/C Low During CE High

AO to CE Setup

AO Valid During CE High

Conversion Time

READ MODE

12-Bit Cycle TMIN to TMAX

8-Bit Cycle TMIN to TMAX

tDD

Access Time from CE

tHD

Data Valid After CE Low

tHL

Output Float Delay

MIN

TYP

-

-

50

-

50

-

50

-

50

-

50

-

0

-

50

-

9

12

6

8

-

75

25

-

-

100

MAX

-

-

-

-

-

-

-

25

17

UNITS

ns

ns

ns

ns

ns

ns

ns

µs

µs

150

ns

-

ns

150

ns

-

ns

-

ns

-

ns

-

ns

-

ns

-

ns

1200

ns

MAX

UNITS

200

ns

-

ns

-

ns

-

ns

-

ns

-

ns

-

ns

-

ns

15

µs

10

µs

150

ns

-

ns

150

ns

6-959

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