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HI1179 データシートの表示(PDF) - Intersil

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HI1179 Datasheet PDF : 14 Pages
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HI1179
INPUT SIGNAL
VOLTAGE
VRT
VRB
STEP
255
128
127
0
MSB
1
1
0
0
A/D OUTPUT CODE TABLE
DIGITAL OUTPUT CODE
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
LSB
1
1
0
0
1
1
0
0
Detailed Description
The HI1179 is a 2-step A/D converter featuring a 4-bit upper
comparator group and two lower comparator groups of 4 bits
each. The reference voltage can be obtained from the
onboard bias generator or be supplied externally. This IC
uses an offset canceling type comparator that operates syn-
chronously with an external clock. The operating modes of
the part are input sampling/autozero (S), hold (H), and
compare (C).
The operation of the part is illustrated in Figure 2. A refer-
ence voltage that is between VRT-VRB is constantly applied
to the upper 4-bit comparator group. VI(1) is sampled with
the falling edge of the first clock by the upper comparator
block. The lower block A also samples VI(1) on the same
edge. The upper comparator block finalizes comparison data
MD(1) with the rising edge of the first clock. Simultaneously
the reference supply generates a reference voltage RV(1)
that corresponds to the upper results and applies it to the
lower comparator block A. The lower comparator block final-
izes comparison data LD(1) with the rising edge of the sec-
ond clock. MD(1) and LD(1) are combined and output as
OUT(1) with the rising edge of the third clock. There is a 2.5
clock cycle delay from the analog input sampling point to the
corresponding digital output data. Notice how the lower com-
parator blocks A and B alternate generating the lower data in
order to increase the overall A/D sampling rate.
Power, Grounding, and Decoupling
Separate analog and digital grounds to reduce noise effects,
connecting them at a single point near the HI1179. Analog
and digital power should also be separated for optimum per-
formance. If a single 5V supply is used, isolate the analog
and digital power with an inductor or ferrite bead to minimize
the digital noise on the analog supply.
Bypass both the digital and analog VDD pins to their respec-
tive grounds with a ceramic 0.1µF capacitor close to the pin.
Analog Input
The analog input capacitance is small when compared with
other flash type A/D converters. However, it is necessary to
drive the input with a low impedance source with sufficient
bandwidth and drive capability.
Op amps such as the HA-2544, the HA5020 and the
HFA1100 family should make excellent input amplifiers
depending on the applications requirements. In order to pre-
vent parasitic oscillation, it may be necessary to insert a
resistor between the output of the amplifier and the A/D
input.
The input can be AC or DC coupled. If AC coupled the input
will float to about 1/2(VRT + VRB). The other option is to use
the internal clamp, which will be discussed later. When DC
coupling the input be sure to disable the clamp function
(CLE, pin 29).
Reference Input
The HI1179 has an internal reference with the option to use
an external reference if more accuracy is desired.
The analog input range of the A/D is set by the voltage
between VRT and VRB. The internal reference can be used
by shorting VRT to VRTS and VRB to VRBS. The internal
bias generator will set VRT to about 2.6V and VRB to about
0.6V. The analog input range of the A/D will now be from
0.6V to 2.6V. The internal reference may be subjected to
power supply variations since the internal reference resistor
ladder is connected directly to VDD and VSS. Any supply
variations can be minimized by good decoupling of VRT and
VR B .
An external reference can be used for increased accuracy,
by connecting the reference voltage to VRT and VRB. If an
external reference is used, VRT should be keep below 2.8V
and (VRT - VRB) should be less than 2.8V and greater than
1.8V. If a VRB below +0.6V is used the linearity of the part
may degrade. An ICL8069 reference and a dual op amp, with
outputs connect to VRT and VRB , makes a good, low cost
external reference.
Bypass VRT and VRB to analog ground with a 0.1µF
capacitor when using either internal or external references.
Clamp Operation
The HI1179 provides a clamp (DC restore) option that allows
the user to clamp a portion of the analog input to a voltage
set by the VREF pin before the signal is digitized. The clamp
4-1119

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