HIP1013(1999) データシートの表示（PDF） - Intersil
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HIP1013 Datasheet PDF : 7 Pages
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HIP1013
Typical Performance Curves (Continued)
102.5
10.2
102.0
12 OC VTth
10.0
101.5
9.8
101.0
5 OC Vth
VDD LOW TO HIGH
VDD HIGH TO LOW
100.5
-40
-20
0
20
40
60
80
TEMPERATURE (oC)
FIGURE 7. OC VOLTAGE THRESHOLD WITH = RILIM 10kΩ
HIP1013 Description and Operation
The HIP1013 offers the designer a cost efficient 5V and 12V
true hot plug controller. This device drives two external
N-Channel MOSFET switches and uses a charge pump to
provide ≈17V to drive the gate of the 12V supply switch. The
HIP1013 features Over Current (OC) programing with a
single external resistor, RILIM and during turn-on, the gate
capacitor of each external N-Channel MOSFET is charged
with a 10µA current source. These capacitors create a
programmable ramp (soft turn-on).
Upon initial power up, the HIP1013 can either isolate the
voltage supply from the load by holding the external
N-Channel MOSFET switches off or apply the supply rail
voltage directly to the load for true hot swap capability. In
either case the HIP1013 turns on in a soft start mode
protecting the supply rail from sudden current loading.
The load currents pass through two external current sense
resistors. When the voltage across either resistor exceeds
the user programmed Over Current (OC) voltage threshold
value, (see Table 1) the HIP1013 controller turns both
N-Channel MOSFETs off in ≈ 2µs.
TABLE 1.
RILIM RESISTOR
15K
NOMINAL OC VTH
150mv
10K
100mV
7.5K
75mV
4.99K
50mV
NOTE: Nominal OC Vth = RILIM x 10 µA
The HIP1013 is reset by a rising edge on either PWRON pin
and is turned on by either PWRON pin being driven low. The
HIP1013 can control either +12V/5V or +3.3V/+5V supplies.
Tying the PWRON1 pin to VDD, invokes the +3.3V/+5V
voltage mode. In this mode, the external charge pump
capacitor is not needed and CPUMP, pin 11 is also tied
9.6
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
TEMPERATURE (oC)
FIGURE 8. POWER ON RESET VOLTAGE THRESHOLD
directly to VDD. Upon any OC or Under Voltage (UV)
condition the PGOOD fault indicating signal will pull low
when tied high through a resistor to the logic supply.
HIP1013 Application Considerations
There is no unique and specific HIP1013 application
evaluation board. Since the HIP1013 is pin compatible with
the HIP1012 device, you can substitute a HIP1013 for the
existing HIP1012 in either of the HIP1012EVAl1 or EVAL2
boards. Otherwise contact your Intersil Corporation sales
office and an already modified board will be provided.
Although pin compatible to the HIP1012, the HIP1013 is a
less featured dual power supply distribution controller and
does not include programmable current limiting regulation
and delay time to latch off.
Random resets can also occur if the HIP1013 (PINS 8 and
14) sense pins are pulled below ground when turning off a
highly inductive load. Place a large load capacitor (10-50µF)
on the output to eliminate unintended resets.
Physical layout of RSENSE resistors is critical to avoid
the possibility of false over current occurrences. Ideally
trace routing between the RSENSE resistors and the HIP1013
VS and VISEN pins are direct and as short as possible with
zero current in the sense lines.
CORRECT
INCORRECT
TO HIP1013
VS AND VISEN
TO HIP1013
VS AND VISEN
CURRENT
SENSE RESISTOR
2-411
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