HM5259165B-75 データシートの表示（PDF） - Elpida Memory, Inc

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HM5259165B-75

512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword × 16-bit × 4-bank/16-Mword × 8-bit × 4-bank /32-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM

Elpida Memory, Inc 

HM5259165B/HM5259805B/HM5259405B-75/A6

• Programmable CAS latency: 2/3

• Byte control by DQM : DQM (HM5259805B/HM5259405B)

: DQMU/DQML (HM5259165B)

• Refresh cycles: 8192 refresh cycles/32 ms

• 2 variations of refresh

 Auto refresh

 Self refresh

Ordering Information

Type No.

Frequency

CAS latency

HM5259165BTD-75*1

133 MHz

3

HM5259165BTD-A6

100 MHz

2/3

HM5259805BTD-75*1

133 MHz

3

HM5259805BTD-A6

100 MHz

2/3

HM5259405BTD-75*1

133 MHz

3

HM5259405BTD-A6

100 MHz

2/3

Notes: 1. 100 MHz operation at CAS latency = 2

Package

400-mil 54-pin plastic TSOP II (TTP-54DA)

Data Sheet E0118H10

2

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