HM-6504/883 データシートの表示（PDF） - Intersil
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HM-6504/883 Datasheet PDF : 10 Pages
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Functional Diagram
HM-6504/883
LSB
A8
A7
A6
A0
A1
A2
D
W
E
A
6
LATCHED
GATED
ADDRESS
REGISTER
ROW
DECODER
64
A
64 x 64
MATRIX
6
L
G
64
G
D LATCH Q
A
L
GATED COLUMN D
Q
Q
DECODER AND
DATA I/O
LATCH
L
A
D
Q
LATCH
L
6
6
A
A
L
D
Q
LATCH
L
LATCHED
ADDRESS
REGISTER
LSB A11 A5 A4 A3 A9 A10
NOTES:
1. All lines active high-positive logic.
2. Three-state Buffers: A high → output active.
3. Control and Data Latches: L low → Q = D and Q latches on rising edge of L.
4. Address Latches: Latch on falling edge of E.
5. Gated Decoders: Gate on rising edge of G.
6-135
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