HS0-565BRH-Q データシートの表示（PDF） - Intersil

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HS0-565BRH-Q

Radiation Hardened High Speed, Monolithic Digital-to-Analog Converter

Intersil 

HS-565BRH, HS-565BEH

Burn-In Bias Circuit

+15V

D1

C1

-15V

D2

C2

+10V

D3

C3

1 NC

BIT 1 24 F0

2 NC

BIT 2 23 F1

3 VCC

BIT 3 22 F2

4 REF OUT BIT 4 21 F3

5 REF GND BIT 5 20 F4

6 REF IN

BIT 6 19 F5

7 -VEE

BIT 7 18 F6

8 BIP OFF BIT 8 17 F7

9 OUT

BIT 9 16 F8

10 10V SPAN BIT 10 15 F9

11 20V SPAN BIT 11 14 F10

12 PWR GND BIT 12 13 F11

NOTES:

D1 = D2 = D3 = IN4002 or Equivalent

F0 to F11:

VIH = 5.0V ±0.5V

VIL = 0.0V ±0.5V

F0 = 100kHz ±10% (50% Duty Cycle)

F1 = F0/2

F7 = F0/128

F2 = F0/4

F8 = F0/256

F3 = F0/8

F9 = F0/512

F4 = F0/16

F10 = F0/1024

F5 = F0/32

F11 = F0/2048

F6 = F0/64

Radiation Bias Circuit

+15V

-15V

+10V

1 NC

BIT 1 24

2 NC

BIT 2 23

3 VCC

BIT 3 22

4 REF OUT BIT 4 21

5 REF GND BIT 5 20

+5V

6 REF IN

BIT 6 19

7 -VEE

BIT 7 18

8 BIP OFF BIT 8 17

9 OUT

BIT 9 16

10 10V SPAN BIT 10 15

11 20V SPAN BIT 11 14

12 PWR GND BIT 12 13

NOTE: Power Supply Levels are ±0.5V

Definitions of Specifications

Digital Inputs

The HS-565BRH, HS-565BEH accepts digital input codes in

binary format and may be user connected for any one of three

binary codes. Straight binary, Two’s Complement (see note

below), or Offset Binary.

DIGITAL

INPUT

MSB...LSB

STRAIGHT

BINARY

ANALOG OUTPUT

OFFSET

BINARY

TWO’S

COMPLEMENT

(Note)

000.... 000

Zero

-FS (Full Scale)

Zero

100.... 000

0.50 FS

Zero

-FS

111.... 111

+FS - 1LSB

+FS - 1LSB

Zero - 1LSB

011.... 111 0.50 FS - 1LSB Zero - 1LSB

+FS - 1LSB

NOTE: Invert MSB with external inverter to obtain Two’s Complement

Coding

Accuracy

Nonlinearity - Nonlinearity of a D/A converter is an important

measure of its accuracy. It describes the deviation from an ideal

straight line transfer curve drawn between zero (all bits OFF) and

full scale (all bits ON).

Differential Nonlinearity - For a D/A converter, it is the difference

between the actual output voltage change and the ideal (1 LSB)

voltage change for a one bit change in code. A Differential

Nonlinearity of ±1 LSB or less guarantees monotonicity; i.e., the

output always increases and never decreases for an increasing

input.

Settling Time

Settling time is the time required for the output to settle to within

the specified error band for any input code transition. It is usually

specified for a full scale or major carry transition, settling to

within 0.50 LSB of final value.

Drift

Gain Drift - The change in full scale analog output over the

specified temperature range expressed in parts per million of full

scale range per °C (ppm of FSR/°C). Gain error is measured with

respect to +25°C at high (TH) and low (TL) temperatures. Gain

drift is calculated for both high (TH - +25°C) and low ranges

(+25°C - TL) by dividing the gain error by the respective change in

temperature. The specification is the larger of the two

representing worst case drift.

Offset Drift - The change in analog output with all bits OFF over

the specified temperature range expressed in parts per million of

full scale range per °C (ppm of FSR/°C). Offset error is

measured with respect to +25°C at high (TH) and low (TL)

temperatures. Offset drift is calculated for both high (TH - +25°C)

and low (+25°C - TL) ranges by dividing the offset error by the

respective change in temperature. The specification given is the

larger of the two, representing worst case drift.

3

FN4607.4

May 7, 2012

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