HT47R20A-1 データシートの表示（PDF） - Holtek Semiconductor
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HT47R20A-1 Datasheet PDF : 41 Pages
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HT47R20A-1/HT47C20-1
Program Memory - EPROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
2048´16 bits, addressed by the program counter and ta-
ble pointer.
Certain locations in the program memory are reserved
for special usage
· Location 000H
This area is reserved for the initialization program. Af-
ter chip reset, the program always begins execution at
location 000H.
· Location 004H
This area is reserved for the external interrupt service
program. If the INT interrupt is enabled and the stack
is not full, the program begins execution at location
004H.
· Location 008H
This area is reserved for the time base interrupt ser-
vice program. If time base interrupt results from a time
base overflow, and if the interrupt is enabled and the
stack is not full, the program begins execution at loca-
tion 008H.
· Location 00CH
This area is reserved for the real time clock interrupt
service program. If a real time clock interrupt results
from a real time clock overflow, and if the interrupt is
enabled and the stack is not full, the program begins
execution at location 00CH.
· Location 010H
This area is reserved for the timer/event counter inter-
rupt service program. If a timer interrupt results from a
timer/event counter A or B overflow, and if the interrupt
is enabled and the stack is not full, the program begins
execution at location 010H.
· Table location
Any location in the ROM space can be used as look up
tables. The instructions TABRDC [m] (the current
page, one page=256 words) and TABRDL [m] (the last
page) transfer the contents of the lower-order byte to
the specified data memory, and the higher-order byte
to TBLH (08H). Only the destination of the lower-order
byte in the table is well-defined, the higher-order byte
of the table word are transferred to the TBLH. The ta-
ble higher-order byte register (TBLH) is read only. The
table pointer (TBLP) is a read/write register (07H),
which indicates the table location. Before accessing
000H
D e v ic e in itia liz a tio n p r o g r a m
004H
E x te r n a l in te r r u p t s u b r o u tin e
008H
T im e b a s e in te r r u p t s u b r o u tin e
00C H
R T C in te r r u p t s u b r o u tin e
0 1 0 H T im e r /e v e n t c o u n te r in te r r u p t s u b r o u tin e
n00H
L o o k - u p ta b le ( 2 5 6 w o r d s )
nFFH
P ro g ra m
M e m o ry
L o o k - u p ta b le ( 2 5 6 w o r d s )
7FFH
1 6 b its
N o te : n ra n g e s fro m 0 to 7
Program Memory
the table, the location must be placed in TBLP. The
TBLH is read only and cannot be restored. If the main
routine and the ISR (Interrupt Service Routine) both
employ the table read instruction, the contents of the
TBLH in the main routine are likely to be changed by
the table read instruction used in the ISR. Errors can
occur. In other words, using the table read instruction
in the main routine and the ISR simultaneously should
be avoided. However, if the table read instruction has
to be applied in both the main routine and the ISR, the
interrupt is supposed to be disabled prior to the table
read instruction. It will not be enabled until the TBLH
has been backed up. All table related instructions
need two cycles to complete the operation. These ar-
eas may function as normal program memory de-
pending upon the requirements.
Stack Register - STACK
This is a special part of the memory which is used to
save the contents of the program counter (PC) only. The
stack is organized into four levels and is neither part of
the data nor part of the program space, and is neither
readable nor writeable. The activated level is indexed by
the stack pointer (SP) and is neither readable nor
writeable. At a subroutine call or interrupt acknowledg-
ment, the contents of the program counter are pushed
onto the stack. At the end of a subroutine or an interrupt
routine, signaled by a return instruction (RET or RETI),
the program counter is restored to its previous value
Table Location
Instruction(s)
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m] P10 P9
P8
@7 @6 @5 @4 @3 @2 @1 @0
TABRDL [m]
1
1
1
@7 @6 @5 @4 @3 @2 @1 @0
Note: *10~*0: Table location bits
P10~P8: Current program counter bits
Table Location
@7~@0: Table pointer bits
Rev. 1.80
8
June 23, 2008
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