HT46R46-H データシートの表示（PDF） - Holtek Semiconductor
部品番号
コンポーネント説明
メーカー
HT46R46-H Datasheet PDF : 42 Pages
| |||
HT46R46-H
A.C. Characteristics
Symbol
Parameter
fSYS
System Clock
Test Conditions
VDD
Conditions
VLVR~5.5V, LVR enabled
¾
3.3V~5.5V, LVR disabled
Min.
400
400
fTIMER Timer I/P Frequency (TMR)
VLVR~5.5V, LVR enabled
0
¾
3.3V~5.5V, LVR disabled 0
tWDTOSC Watchdog Oscillator Period
5V
¾
32
tWDT1
Watchdog Time-out Period (RC) ¾
¾
215
tWDT2
Watchdog Time-out Period
(System Clock)
¾
¾
217
tRES
External Reset Low Pulse Width ¾
¾
1
tSST
System Start-up Timer Period
¾ Wake-up from HALT
¾
tINT
Interrupt Pulse Width
¾
¾
1
tAD
A/D Clock Period
¾
¾
0.5
tADC
A/D Conversion Time
¾
¾
¾
tADCS
A/D Sampling Time
¾
¾
¾
Note: *tSYS=1/fSYS
Typ.
¾
¾
¾
¾
65
¾
¾
¾
1024
¾
¾
64
32
Ta=25°C
Max. Unit
4000 kHz
8000 kHz
4000 kHz
8000 kHz
130 ms
216
tWDTOS
C
218
tSYS
¾
ms
¾
*tSYS
¾
ms
¾
ms
¾
tAD
¾
tAD
Ta=125°C
Symbol
Parameter
fSYS
System Clock
Test Conditions
VDD
Conditions
VLVR~5.5V, LVR enabled
¾
3.3V~5.5V, LVR disabled
fTIMER Timer I/P Frequency (TMR)
VLVR~5.5V, LVR enabled
¾
3.3V~5.5V, LVR disabled
tWDTOSC Watchdog Oscillator Period
5V
¾
tRES
External Reset Low Pulse Width ¾
¾
tSST
System Start-up Timer Period
¾ Wake-up from HALT
tINT
Interrupt Pulse Width
¾
¾
tAD
A/D Clock Period
¾
¾
tADC
A/D Conversion Time
¾
¾
tADCS
A/D Sampling Time
¾
¾
Min.
400
400
0
0
60
1
¾
1
1
¾
¾
Typ.
¾
¾
¾
¾
120
¾
1024
¾
¾
64
32
Max.
4000
8000
4000
8000
240
¾
¾
¾
¾
¾
¾
Unit
kHz
kHz
kHz
kHz
ms
ms
*tSYS
ms
ms
tAD
tAD
Note: *tSYS=1/fSYS
Rev. 1.40
6
March 1, 2006
Share Link: 