HT6576A データシートの表示（PDF） - Holtek Semiconductor

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HT6576A

Advanced SCSI CHIP

Holtek Semiconductor 

HT6576A

Address 1: Initiator command register

WRITE

7

6

5

4

ASSERT

RST

TRI–STATE RESERVED

ASSERT

ACK

3

ASSERT

BSY

2

ASSERT

SEL

1

ASSERT

ATN

0

ASSERT

DATA

• BIT 7: ASSERT RST

WHEN SET, THE RST SIGNAL IS ASSERTED ON THE SCSI BUS

• BIT 6: TRI–STATE (TEST MODE)

• BIT 5: RESERVED (0)

• BIT 4: ASSERT ACK

WHEN SET, THE ACK SIGNAL IS ASSERTED ON THE SCSI BUS

• BIT 3: ASSERT BSY

WHEN SET, THE BSY SIGNAL IS ASSERTED ON THE SCSI BUS

• BIT 2: ASSERT SEL

WHEN SET, THE SEL SIGNAL IS ASSERTED ON THE SCSI BUS

• BIT 1: ASSERT ATN

WHEN SET, THE ATN SIGNAL IS ASSERTED ON THE SCSI BUS

• BIT 0: ASSERT DATA

WHEN SET, This bit allows the contents of the output data register to be enabled as chip outputs

on SCSI signal DB0–DB7

READ

7

RET

6

ARBIT

PROGRESS

5

LOST

ARBIT

4

ACK

3

BSY

2

SEL

1

ATN

0

ASSERT

DATA

Address 2: Mode register

READ/WRITE

7

6

5

LOCK

DMA

TARGET ENABLE

MODE PARITY

4

ENABLE

PARITY

3

2

ENABLE

EOP

MONITOR

CHECK

BUSY

1

DMA

IRQ

MODE

• BIT 7: BLOCK MODE DMA

• BIT 6: TARGET MODE

When set, the chip operates as an SCSI bus target device.

• BIT 5: ENABLE PARITY CHECKING

When set, data received on the SCSI data bus is checked for odd parity.

0

ARBIT

4

14th July ’97

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