HT66F60 データシートの表示（PDF） - Holtek Semiconductor
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HT66F60 Datasheet PDF : 246 Pages
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HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
P A 0 /C 0 X /T P 0 _ 0 /A N 0 1
VSS&AVSS 2
P B 4 /X T 2 3
P B 3 /X T 1 4
P B 2 /O S C 2 5
P B 1 /O S C 1 6
VDD 7
P B 0 /R E S 8
P C 1 /T P 1 B _ 1 /S C O M 1 9
P C 0 /T P 1 B _ 0 /S C O M 0 1 0
P C 7 /[T P 1 A ]/S C O M 3 1 1
P C 6 /[T P 0 _ 0 ]/S C O M 2 1 2
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ] 1 3
P D 2 /[T C K 0 ]/[S D I/S D A ] 1 4
2 8 P A 1 /T P 1 A /A N 1
2 7 P A 2 /T C K 0 /C 0 + /A N 2
2 6 P A 3 /IN T 0 /C 0 -/A N 3
2 5 P A 4 /IN T 1 /T C K 1 /A N 4
2 4 P A 5 /C 1 X /S D O /A N 5
2 3 P A 6 /S D I/S D A /A N 6
2 2 P A 7 /S C K /S C L /A N 7
2 1 P B 5 /S C S /V R E F
2 0 P C 2 /T C K 2 /P C K /C 1 +
1 9 P C 3 /P IN T /T P 2 _ 0 /C 1 -
1 8 P C 4 /[IN T 0 ]/[P IN T ]/T C K 3 /T P 2 _ 1
1 7 P C 5 /[IN T 1 ]/T P 0 _ 1 /T P 1 B _ 2 /[P C K ]
1 6 P D 0 /[T C K 2 ]/T P 3 _ 1 /[S C S ]
1 5 P D 1 /[T P 2 _ 0 ]/[S D O ]/[S C K /S C L ]
H T66F50
2 8 S K D IP -A /S O P -A /S S O P -A
P B 5 /S C S /V R E F
P A 7 /S C K /S C L /A N 7
P A 6 /S D I/S D A /A N 6
P A 5 /C 1 X /S D O /A N 5
P A 4 /IN T 1 /T C K 1 /A N 4
P A 3 /IN T 0 /C 0 -/A N 3
P A 2 /T C K 0 /C 0 + /A N 2
P A 1 /T P 1 A /A N 1
P A 0 /C 0 X /T P 0 _ 0 /A N 0
P F 1 /[C 1 X ]
40 39 38 37 36 35 34 33 32 31
1
30
2
29
3
28
4
27
5
H T66F50
26
6
4 0 Q F N -A
25
7
24
8
23
9
22
10
21
11 12 13 14 1516 17 18 19 20
P D 2 /[T C K 0 ]/[S D I/S D A ]
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ]
P D 4 /[T P 2 _ 1 ]
P D 5 /[T P 0 _ 1 ]
P C 6 /[T P 0 _ 0 ]/S C O M 2
P C 7 /[T P 1 A ]/S C O M 3
P C 0 /T P 1 B _ 0 /S C O M 0
P C 1 /T P 1 B _ 1 /S C O M 1
P E 4 /[T P 1 B _ 2 ]
P E 5 /[T P 3 _ 0 ]
P A 0 /C 0 X /T P 0 _ 0 /A N 0
P F 1 /[C 1 X ]
P F 0 /[C 0 X ]
P E 7 /[IN T 1 ]
P E 6 /[IN T 0 ]
VSS&AVSS
P B 4 /X T 2
P B 3 /X T 1
P B 2 /O S C 2
P B 1 /O S C 1
VDD&AVDD
P B 0 /R E S
P E 5 /[T P 3 _ 0 ]
P E 4 /[T P 1 B _ 2 ]
P C 1 /T P 1 B _ 1 /S C O M 1
P C 0 /T P 1 B _ 0 /S C O M 0
NC
P C 7 /[T P 1 A ]/S C O M 3
P C 6 /[T P 0 _ 0 ]/S C O M 2
P E 3 /[T P 3 _ 1 ]
PE2
PE1
PE0
P D 5 /[T P 0 _ 1 ]
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
H T66F50
4 8 S S O P -A
P A 1 /T P 1 A /A N 1
P A 2 /T C K 0 /C 0 + /A N 2
P A 3 /IN T 0 /C 0 -/A N 3
P A 4 /IN T 1 /T C K 1 /A N 4
P A 5 /C 1 X /S D O /A N 5
P A 6 /S D I/S D A /A N 6
P A 7 /S C K /S C L /A N 7
P B 5 /S C S /V R E F
P B 6 /[S D O ]
P B 7 /[S D I/S D A ]
P D 6 /[S C K /S C L ]
P D 7 /[S C S ]
P C 4 /[IN T 0 ]/[P IN T ]/T P 2 _ 1
NC
NC
NC
P C 2 /T C K 2 /P C K /C 1 +
P C 3 /P IN T /T P 2 _ 0 /C 1 -
P C 5 /[IN T 1 ]/T P 0 _ 1 /T P 1 B _ 2 /[P C K ]
P D 0 /[T C K 2 ]/[S C S ]
P D 1 /[T P 2 _ 0 ]/[S D O ]/[S C K /S C L ]
P D 2 /[T C K 0 ]/[S D I/S D A ]
P D 3 /[T C K 1 ]/[S D O ]
P D 4 /[T P 2 _ 1 ]
P B 5 /S C S /V R E F
P A 7 /S C K /S C L /A N 7
P A 6 /S D I/S D A /A N 6
P A 5 /C 1 X /S D O /A N 5
P A 4 /IN T 1 /T C K 1 /A N 4
P A 3 /IN T 0 /C 0 -/A N 3
P A 2 /T C K 0 /C 0 + /A N 2
P A 1 /T P 1 A /A N 1
P A 0 /C 0 X /T P 0 _ 0 /A N 0
P F 1 /[C 1 X ]
P F 0 /[C 0 X ]
44 43 42 41 40 39 38 37 36 35 34
1
33
2
32
3
31
4
30
5
6
7
H T66F50
4 4 Q F P -A
29
28
27
8
26
9
25
10
24
11
23
12 13 14 15 16 17 18 19 20 21 22
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ]
P D 4 /[T P 2 _ 1 ]
P D 5 /[T P 0 _ 1 ]
PE0
PE1
PE2
P E 3 /[T P 3 _ 1 ]
P C 6 /[T P 0 _ 0 ]/S C O M 2
P C 7 /[T P 1 A ]/S C O M 3
P C 0 /T P 1 B _ 0 /S C O M 0
P C 1 /T P 1 B _ 1 /S C O M 1
NC
P B 5 /S C S /V R E F
P A 7 /S C K /S C L /A N 7
P A 6 /S D I/S D A /A N 6
P A 5 /C 1 X /S D O /A N 5
P A 4 /IN T 1 /T C K 1 /A N 4
P A 3 /IN T 0 /C 0 -/A N 3
P A 2 /T C K 0 /C 0 + /A N 2
P A 1 /T P 1 A /A N 1
P A 0 /C 0 X /T P 0 _ 0 /A N 0
NC
P F 1 /[C 1 X ]
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
H T66F50
31
7
4 8 Q F N -A
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ]
P D 4 /[T P 2 _ 1 ]
P D 5 /[T P 0 _ 1 ]
PE0
PE1
PE2
P E 3 /[T P 3 _ 1 ]
P C 6 /[T P 0 _ 0 ]/S C O M 2
P C 7 /[T P 1 A ]/S C O M 3
NC
P C 0 /T P 1 B _ 0 /S C O M 0
P C 1 /T P 1 B _ 1 /S C O M 1
Note:
1. Bracketed pin names indicate non-default pinout remapping locations.
2. If the pin-shared pin functions have multiple outputs simultaneously, its pin names at the right side of the
²/² sign can be used for higher priority.
3. VDD&AVDD means the VDD and AVDD are the double bonding.
Rev. 1.10
5
February 1, 2010
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