HT82V842 データシートの表示（PDF） - Holtek Semiconductor
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HT82V842 Datasheet PDF : 18 Pages
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HT82V842
Address
R/W
Register Name
A3 A2 A1 A0
W 0 0 0 0 Mode 1
Function Description
DOUT timing control/OUTCK polarity/ADCK polarity/ADIN connec-
tion/ADC output/Black level reset/Power down
W 0 0 0 1 Mode 2
Clamp current/ADIN clamp/Clamp target/S/H, enable logic/Monitor
selection
W 0 0 1 0 Mode 3/CDS gain CDS gain control/Black loop gain boost/Boost period
W 0 0 1 1 PGA gain
PGA gain
W 0 1 0 0 Black level
ADC code at black level (1 LSB step)
Register Map
Register Bit Assignment
D9
Mode 1
Default
X
Functions
DOUT timing control
OUTCK polarity
ADCK polarity
ADIN connection
Reserved
ADC output
Black level reset
Power down
Mode 2
Default
X
Functions
Clamp current
ADIN clamp
Clamp target
S/H, enable logic
Monitor selection
Mode 3
Default
X
Functions
CDS gain control
Black loop gain boost
Boost period
PGA Gain
Default
X
Functions
PGA gain
Black Level
Default
X
Functions
Black level
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
Ö
Ö
Ö
------
Ö
Ö
Ö
Ö
X
0
0
0
0
0
0
0
0
Ö
Ö
------
------
------
X
X
X
0
0
0
0
0
0
------
Ö
---------------------------
0
0
0
0
0
0
0
0
0
----------------------------------------------------------------------------------------------------
X
X
1
0
0
0
0
0
0
------------------------------------------------------------------------
Rev. 1.00
8
July 15, 2004
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