HT82V842A データシートの表示（PDF） - Holtek Semiconductor

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HT82V842A

10-Bit 20MSPS CCD Analog Signal Processor

Holtek Semiconductor 

HT82V842A

Register Operations

Mode 1

DOUT timing control

OUTCK polarity

ADCK polarity

ADIN connection

Reserved

ADC output

Black level reset

Power down

Mode 2

Clamp current

ADIN clamp

Clamp target

S/H, enable logic

Monitor selection

Mode 3

CDS gain control

Black loop gain boost

Control

D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Operations

0

DOUT synchronizes to ADCK

1

DOUT synchronizes to OUTCK

0

DOUT changes at OUTCK rising edge

1

DOUT changes at OUTCK falling edge

0

Normal operation as timing chart

1

ADCK clock inversion

00

ADIN function OFF

01

ADIN signal to PGA

1x

ADIN signal to ADC

0

Reserved

1

Reserved

0

Normal operation, ADC data output

1

ADC output high-Z, or logic of STBY

0

Normal operation

1

Black level reset, or logic of RESET

0 Normal operation

1 Power down, or logic of STBY

0

Normal clamp ±50mA

1

Fast clamp ±100mA

0

Clamp operation active for ADIN

1

No clamp for ADIN

00

Normal mode, clamp both REFIN and CCDIN

01

Clamp REFIN only

10

Clamp CCDIN only

11

Clamp off

00

Normal operation as timing chart

01

S/H control polarity inversion

10

Enable control polarity inversion

11

Both of S/H and enable inversion

0 0 Monitor off

0 1 CDS signal to monitor

1 0 PGA output monitor

1 1 Output REFIN and CCDIN

00

01

10

11

0

1

CDS gain=odB

CDS gain=6.02dB

CDS gain=12.04dB

CDS gain=-1.94dB

Boost control on

Always high gain

Rev. 1.00

9

January 2, 2006

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