HV9608 データシートの表示（PDF） - Supertex Inc

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HV9608

Active Clamp Current-Mode PWM Controller

Supertex Inc 

Functional Block Diagram

HV9608

VIN

REF

RT

VS

Comp

FB

Bandgap

reference

High Voltage

startup regulator

+

1.135V

-

Oscillator

+

1.135V

-

pwm

POR

+

1.135V

-

SQ

R

R

Delay

Logic

1.135V

+

eAmp

Ι

5.45V

-

+

3.85V

Ι

-

0.6V

+

100ns blanking

UVLO

+

- 0.6V

ramp

-

+

VDD

UVLO

driver

GATE

AGATE

DT1

DT2

CS

GND

SS

Functional Description

SC

the hysteresis that can be calculated in accordance with the

following equation:

HIGH VOLTAGE REGULATOR

When DC voltage from 12 to 250V is applied to the VIN pin, an

internal high voltage linear regulator provides a regulated output

voltage of 9.3V at the VDD pin. This voltage can be used to start the

DC/DC converter. Applying external voltage to the VDD pin that is

higher than its output voltage will disable the regulator. Therefore,

the VIN pin will draw negligible current once the DC/DC converter

has started, and a “bootstrap” voltage has developed at the VDD

pin. Alternatively, the high voltage regulator can continuously

supply bias current up to 20mA powering the gate driver and all

internal circuits of HV9608. The need for a bootstrap power supply

would be eliminated in this case. However, caution must be taken

to maintain the HV9608 within its package power dissipation limits.

The output of the linear regulator is equipped with an under voltage

protection comparator that disables all internal circuits when the

voltage at the VDD pin falls below 7.62V. Hysteresis of 0.76V is

provided.

∆VUVLO

= 14µ A⋅

R1 ⋅ R2

R1 + R2

,

where R1 and R2 are the input voltage divider resistors.

OSCILLATOR FREQUENCY

The switching frequency of the HV9608 can be programmed using

a single resistor connected to the RT pin:

RT

=

⎛

⎜⎜⎝

1

[ FOSC

Hz

]

−

300

⋅10−9

⎞

⎟⎟⎠

CT [F ]

SOFT START

INPUT UNDER VOLTAGE LOCKOUT (UVLO)

As soon as the voltage at the VDD pin exceeds the turn-on

threshold, a 7µA current is sourced from the SS pin into an

The HV9608 provides a programmable under voltage protection

input (UVLO pin) that allows independent setting of the turn-on and

the turn-off limits for the input voltage of the DC/DC converter.

When the voltage applied to the UVLO pin exceeds 1.135V, the

gate driver and the reference voltage at the VREF pin are enabled,

and the DC/DC converter starts switching. At the same time, a

current of 14µA is sourced from the UVLO pin. This current sets

external soft-start capacitor CSS. As the voltage across CSS ramps

up linearly, the output of the error amplifier (COMP) gradually

increases until regulation of the output voltage is achieved. Sizing

CSS programs the time duration of the soft start mode. When CSS is

sized properly, no overshoot of the output voltage or excessive

input inrush current will occur. When the voltage at the VDD pin falls

below the under voltage protection threshold, CSS is rapidly

discharged to zero.

5

A122104

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