ICS8305AG データシートの表示（PDF） - Integrated Circuit Systems

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ICS8305AG

LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS8305

LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/

LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

TABLE 3A. CONTROL INPUT FUNCTION TABLE

Inputs

Outputs

OE

CLK_EN

CLK_SEL

Selected Source

Q0:Q3

1

0

0

LVCMOS_CLK

Disabled; LOW

1

0

1

CLK, nCLK

Disabled; LOW

1

1

0

LVCMOS_CLK

Enabled

1

1

1

CLK, nCLK

Enabled

0

X

X

HiZ

NOTE: After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge

as shown in Figure 1.

In the active mode, the state of the outputs are a function of the LVCMOS_CLK and CLK, nCLK inputs as described in

Table 3B.

nCLK

CLK,

LVCMOS_CLK

CLK_EN

Disabled

Enabled

Q0:Q3

FIGURE 1. CLK_EN TIMING DIAGRAM

8305AG

www.icst.com/products/hiperclocks.html

3

REV. B FEBRUARY 26, 2004

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