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ICS810001-21 データシートの表示(PDF) - Integrated Circuit Systems

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ICS810001-21
ICST
Integrated Circuit Systems ICST
ICS810001-21 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Integrated
Circuit
Systems, Inc.
BLOCK DIAGRAM
PRELIMINARY
ICS810001-21
FEMTOCLOCKS™ DUAL VCXO VIDEO PLL
Loop
Filter
CLK0
CLK1
CLK_SEL
4
V3:V0
VCXO Input
0 Pre-Divider
1
(P Value
from Table)
VCXO
Divider
Table
Phase
Detector
0
1
Charge
Pump
VCXO
VCXO Feedback Divider
(M Value from Table)
VCXO Jitter Attenuation PLL
00
01
Output
FemtoClock
10
Frequency Multiplier
Divider
01
10
10
Q
11
0= x22
11
00 = 4
11
01 = 8
OE
MR
Master Reset
1= x24
10 = 12
11 = 18
MF
2
N1:N0
2
nBP1:nBP0
810001BK-21
www.icst.com/products/hiperclocks.html
2
REV. A AUGUST 12, 2005

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