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ICS810001-21 データシートの表示(PDF) - Integrated Circuit Systems

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ICS810001-21
ICST
Integrated Circuit Systems ICST
ICS810001-21 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS810001-21
FEMTOCLOCKS™ DUAL VCXO VIDEO PLL
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
LF1, LF0
Analog
Input/Output
3
ISET
Analog
Input/Output
Loop filter connection node pins.
Charge pump current setting pin.
4, 11, 25
5, 22
VDD
nBP0,
nBP1
Power
Input
Core power supply pins.
Pullup PLL Bypass control pins. See block diagram.
6, 20, 29
GND
Power
Power supply ground.
7
CLK_SEL
Input
Pulldown
Input clock select. When HIGH selects CLK1. When LOW, selects
CLK0. LVCMOS/LVTTL interface levels.
8, 9
CLK1, CLK0
Input
Pulldown Clock inputs. LVCMOS/LVTTL interface levels.
10, 14,
15, 16
12
13
V0, V1,
V2, V3
MR
MF
Input
Input
Input
Pulldown VCXO PLL divider selection pins. LVCMOS/LVTTL interface levels.
Pulldown
Pulldown
Active HIGH Master Reset. When logic HIGH, the internal dividers
are reset causing the output to go low. When logic LOW, the
internal dividers and the output is enabled.
LVCMOS / LVTTL interface levels.
FemtoClock multiplication factor select pin.
LVCMOS/LVTTL interface levels.
17
VDDA
Power
18
VDDO
Power
19
Q
Output
Analog supply pin.
Output power supply pin.
VCXO PLL clock output. LVCMOS/LVTTL interface levels.
21
OE
Input
Pullup
Output enable. When logic LOW, the clock output is in tristate.
When logic HIGH, the output is enabled.
LVCMOS/LVTTL interface levels.
23, 24
N1, N0
Input
Pulldown FemtoClock output divide select. LVCMOS/LVTTL interface levels.
26
XTAL_SEL
27,
XTAL_OUT1,
28
XTAL_IN1
30,
XTAL_OUT0,
31
XTAL_IN0
Input
Input
Input
Pulldown
Crystal select. When HIGH, selects XTAL1. When LOW, selects
XTAL0. LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN1 is the input.
XTAL_OUT1 is the output.
Crystal oscillator interface. XTAL_IN0 is the input.
XTAL_OUT0 is the output.
32
VDDX
Power
Power supply pin for VCXO charge pump.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
C
PD
RPULLUP
RPULLDOWN
Parameter
Input Capacitance
Power Dissipation Capacitance
(per output)
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
V , V , V = 3.465V
DD DDA
DDO
Minimum Typical Maximum Units
4
pF
TBD
pF
51
kΩ
51
kΩ
810001BK-21
www.icst.com/products/hiperclocks.html
3
REV. A AUGUST 12, 2005

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