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ICX098AL データシートの表示(PDF) - Sony Semiconductor

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ICX098AL Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ICX098AK
Block Diagram and Pin Configuration
(Top View)
7
6
5
4
3
2
1
G
B
G
R
G
R
G
B
G
R
G
R
G
B
G
R
G
R
Horizontal register
B
G
B
G
B
G Note)
8
9
10
11
12
13 14
Note) : Photo sensor
Pin Description
Pin No. Symbol
Description
Pin No. Symbol
Description
1
Vφ1
Vertical register transfer clock
8
VDD
Supply voltage
2
Vφ3
Vertical register transfer clock
9 GND GND
3
Vφ2A
Vertical register transfer clock
4
Vφ2B
Vertical register transfer clock
10 φSUB Substrate clock
11
CSUB
Substrate bias1
5
VL
Protective transistor bias
12 φRG Reset gate clock
6 GND GND
13 Hφ1
Horizontal register transfer clock
7
VOUT
Signal output
14 Hφ2
Horizontal register transfer clock
1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance
of 0.1µF.
Absolute Maximum Ratings
Item
VDD, VOUT, φRG – φSUB
Vφ2A, Vφ2B φSUB
Against φSUB Vφ1, Vφ3, VL φSUB
Hφ1, Hφ2, GND – φSUB
CSUB φSUB
VDD, VOUT, φRG, CSUB – GND
Against GND Vφ1, Vφ2A, Vφ2B, Vφ3 – GND
Hφ1, Hφ2 – GND
Against VL
Vφ2A, Vφ2B – VL
Vφ1, Vφ3, Hφ1, Hφ2, GND – VL
Between input
clock pins
Voltage difference between vertical clock input pins
Hφ1 – Hφ2
Hφ1, Hφ2 – Vφ3
Storage temperature
Operating temperature
2 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%.
–2–
Ratings
–40 to +10
–50 to +15
–50 to +0.3
–40 to +0.3
–25 to
–0.3 to +18
–10 to +18
–10 to +5
–0.3 to +28
–0.3 to +15
to +15
–5 to +5
–13 to +13
–30 to +80
–10 to +60
Unit Remarks
V
V
V
V
V
V
V
V
V
V
V
2
V
V
°C
°C

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