ICSSSTUB32864A データシートの表示（PDF） - Integrated Device Technology

部品番号

コンポーネント説明

メーカー

ICSSSTUB32864A

25-Bit Configurable Registered Buffer for DDR2

Integrated Device Technology 

ICSSSTUB32864A

Advance Information

Electrical Characteristics - DC

TA = 0 - 70°C; VDD = 1.8 +/-0.1V (unless otherwise stated)

SYMBOL PARAMETERS

CONDITIONS

VIK

VOH

VOL

II All Inputs

Standby (Static)

II = -18mA

IOH = -6mA

IOL = 6mA

VI = VDD or GND

RESET# = GND

IDD

Operating (Static)

VI = VIH(AC) or VIL(AC),

RESET# = VDD

RESET# = VDD,

Dynamic operating VI = VIH(AC) or VIL(AC),

(clock only)

CLK and CLK# switching

50% duty cycle.

Dynamic Operating RESET# = VDD,

IDDD (per each data input) VI = VIH(AC) or VIL (AC),

IO = 0

1:1 mode

CLK and CLK# switching

50% duty cycle. One data

Dynamic Operating input switching at half

(per each data input) clock frequency, 50%

1:2 mode

duty cycle

Data Inputs

Ci CLK and CLK#

RESET#

VI = VREF ±350mV

VICR = 1.25V, VI(PP) = 360mV

VI = VDD or GND

Notes:

1 - Guaranteed by design, not 100% tested in production.

VDD

1.7V

1.7V

1.9V

1.9V

1.8V

MIN TYP MAX

-1.2

1.2

0.5

-5

5

100

40

UNITS

V

µA

µA

mA

39

µ/clock

MHz

19

µA/ clock

MHz/data

35

2.5

3.5

pF

2

3

2.5

1166—10/05/05

7

Share Link: