IDT7429FCT2053ATP データシートの表示（PDF） - Integrated Device Technology

部品番号

コンポーネント説明

メーカー

IDT7429FCT2053ATP

FAST CMOS OCTAL REGISTERED TRANSCEIVERS

Integrated Device Technology 

IDT29FCT52AT/BT/CT/DT, IDT29FCT/2052AT/BT/CT, IDT29FCT53AT/BT/CT

FAST CMOS OCTAL REGISTERED TRANSCEIVERS

PIN CONFIGURATIONS

B7

B6

B5

B4

B3

B2

B1

B0

OEB

CPA

CEA

GND

1

24

2

23

3

22

4 P24-1 21

5 D24-1 20

6

SO24-2

SO24-7*

19

7 SO24-8* 18

8

&

17

9 E24-1 16

10

15

11

14

12

13

Vcc

A7

A6

A5

A4

A3

A2

A1

A0

OEA

CPB

CEB

2629 drw 02

DIP/SOIC/SSOP/QSOP/CERPACK

TOP VIEW

* For 29FCT52/29FCT2052AT/BT/CT only

MILITARY AND COMMERCIAL TEMPERATURE RANGES

INDEX

B4

B3

B2

NC

B1

B0

OEB

4 3 2 28 27 26

5

1

25 A 5

6

24 A 4

7

23 A 3

8

L28-1

22 NC

9

21 A 2

10

20 A 1

11

19 A 0

12 13 14 15 16 17 18

LCC

TOP VIEW

2629 drw 03

PIN DESCRIPTION

Name I/O

Description

A0-7 I/O Eight bidirectional lines carrying the A Register inputs or B Register outputs.

B0-7

CPA

CEA

OEB

CPB

CEB

OEA

I/O Eight bidirectional lines carrying the B Register inputs or A Register outputs.

I Clock for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of

the CPA signal.

I Clock Enable for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition

of the CPA signal. When CEA is HIGH, the A Register holds its contents, regardless of CPA signal transitions.

I Output Enable for the A Register. When OEB is LOW, the A Register outputs are enabled onto the B0-7 lines. When

OEB is HIGH, the B0-7 outputs are in the high-impedance state.

I Clock for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of

the CPB signal.

I Clock Enable for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition

of the CPB signal. When CEB is HIGH, the B Register holds its contents, regardless of CPB signal transitions.

I Output Enable for the B Register. When OEA is LOW, the B Register outputs are enabled onto the A0-7 lines. When

OEA is HIGH, the A0-7 outputs are in the high-impedance state.

2629 tbl 01

6.1

2

Share Link: