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IDT71V016SA10PH8 データシートの表示(PDF) - Integrated Device Technology

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IDT71V016SA10PH8
IDT
Integrated Device Technology IDT
IDT71V016SA10PH8 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
IDT71V016SA, 3.3V CMOS Static RAM
1 Meg (64K x 16-Bit)
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics (VDD = Min. to Max., Commercial and Industrial Temperature Ranges)
71V016SA10(2)
71V016SA12
71V016SA15
71V016SA20
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC
Read Cycle Time
10
____
12
____
15
____
20
____
ns
tAA
Address Access Time
____
10
____
12
____
15
____
20
ns
tACS
Chip Select Access Time
____
10
____
12
____
15
____
20
ns
tCLZ(1)
Chip Select Low to Output in Low-Z
4
____
4
____
5
____
5
____
ns
tCHZ(1)
tOE
tOLZ(1)
Chip Select High to Output in High-Z
Output Enable Low to Output Valid
Output Enable Low to Output in Low-Z
____
5
____
6
____
6
____
8
ns
____
5
____
6
____
7
____
8
ns
0
____
0
____
0
____
0
____
ns
tOHZ(1)
tOH
tBE
tBLZ(1)
Output Enable High to Output in High-Z
Output Hold from Address Change
Byte Enable Low to Output Valid
Byte Enable Low to Output in Low-Z
____
5
____
6
____
6
____
8
ns
4
4
4
4
ns
5
6
7
____
8
ns
0
____
0
____
0
____
0
____
ns
tBHZ(1)
Byte Enable High to Output in High-Z
WRITE CYCLE
tWC
Write Cycle Time
tAW
Address Valid to End of Write
tCW
Chip Select Lo w to End of Write
tBW
Byte Enable Lo w to End of Write
tAS
Address Set-up Time
tWR
Address Hold from End of Write
tWP
Write Pulse Width
tDW
Data Valid to End of Write
tDH
Data Hold Time
tOW(1)
Write Enable High to Output in Low-Z
____
5
____
6
____
6
____
8
ns
10
____
7
____
7
____
7
____
0
____
0
____
7
____
5
____
0
____
3
____
12
____
8
____
8
____
8
____
0
____
0
____
8
____
6
____
0
____
3
____
15
____
10
____
10
____
10
____
0
____
0
____
10
____
7
____
0
____
3
____
20
____
ns
12
____
ns
12
____
ns
12
____
ns
0
____
ns
0
____
ns
12
____
ns
9
____
ns
0
____
ns
3
____
ns
tWHZ(1)
Write Enable Low to Output in High-Z
____
5
____
6
____
6
____
8
ns
NOTES:
1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
2. 0°C to +70°C temperature range only.
3834 tbl 10
Timing Waveform of Read Cycle No. 1(1,2,3)
tRC
ADDRESS
tAA
tOH
DATAOUT
PREVIOUS DATAOUT VALID
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS is LOW.
3. OE, BHE, and BLE are LOW.
tOH
DATAOUT VALID
3834 drw 06
6.452

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