IDT72421/72201/72211/72221/72231/72241 CMOS SyncFIFO™
64 x 9, 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9
WCLK
tCLK
tCLKH
tCLKL
tENS
tENH
MILITARY AND COMMERCIAL TEMPERATURE RANGES
LD
WEN1
tENS
tDS
tDH
D0 - D7
PAE OFFSET
(LSB)
PAE OFFSET
(MSB)
PAF OFFSET
(LSB)
PAF OFFSET
(MSB)
Figure 12. Write Offset Registers Timing
2655 drw 14
RCLK
LD
REN1,
REN2
Q0 - Q7
tCLK
tCLKH
tCLKL
tENS
tENH
tENS
tA
DATA IN OUTPUT REGISTER
EMPTY OFFSET
(LSB)
EMPTY OFFSET
(MSB)
Figure 13. Read Offset Registers Timing
FULL OFFSET
(LSB)
FULL OFFSET
(MSB)
2655 drw 15
5.07
17