IDT72200 データシートの表示（PDF） - Integrated Device Technology

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IDT72200

CMOS SyncFIFO™ 64 x 8, 256 x 8, 512 x 8, 1,024 x 8, 2,048 x 8 and 4,096 x 8

Integrated Device Technology 

IDT72420/72200/72210/72220/72230/72240 CMOS SYNCFIFO™

64 x 8, 256 x 8, 512 x 8, 1,024 x 8, 2,048 x 8, 4,096 x 8

OPERATING CONFIGURATIONS

SINGLE DEVICE CONFIGURATION - A single IDT72420/72200/72210/

72220/72230/72240 may be used when the application requirements are

for 64/256/512/1,024/2,048/4,096 words or less. See Figure 10.

RESET (RS)

WRITE CLOCK (WCLK)

WRITE ENABLE (WEN)

DATA IN (D0-D7)

FULL FLAG (FF)

ALMOST-FULL (AF)

IDT

72420

72200

72210

72220

72230

72240

COMMERCIAL TEMPERATURE RANGE

READ CLOCK (RCLK)

READ ENABLE (REN)

OUTPUT ENABLE (OE)

DATA OUT (Q0-Q7)

EMPTY FLAG (EF)

ALMOST-EMPTY(AE)

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Figure 10. Block Diagram of Single 64 x 8, 256 x 8, 512 x 8, 1,024 x 8, 2,048 x 8, 4,096 x 8 Synchronous FIFO

WIDTH EXPANSION CONFIGURATION - Word width may be increased

simply by connecting the corresponding input control signals of multiple

devices. A composite flag should be created for each of the endpoint status

flags (EF and FF) The partial status flags (AE and AF) can be detected from

any one device. Figure 11 demonstrates a 16-bit word width by using two

IDT72420/72200/72210/72220/72230/72240s. Any word width can be

attained by adding additional IDT72420/72200/72210/72220/72230/72240s.

RESET (RS)

DATA IN (D)

16

8

WRITE CLOCK (WCLK)

WRITE ENABLE (WEN)

ALMOST-FULL (AF)

FULL FLAG (FF) #1

FULL FLAG (FF) #2

IDT

72420

72200

72210

72220

72230

72240

8

8

RESET (RS)

IDT

72420

72200

72210

72220

72230

72240

READ CLOCK (RCLK)

READ ENABLE (REN)

OUTPUT ENABLE (OE)

ALMOST-EMPTY (AE)

EMPTY FLAG (EF) #1

EMPTY FLAG (EF) #2

8 DATA OUT (Q)

16

Figure 11. Block Diagram of 64 x 16, 256 x 16, 512 x 16, 1,024 x 16, 2,048 x 16, 4,096 x 16

Synchronous FIFO Used in a Width Expansion Configuration

10

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