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IDT54FCT162373TE データシートの表示(PDF) - Integrated Device Technology

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IDT54FCT162373TE
IDT
Integrated Device Technology IDT
IDT54FCT162373TE Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
IDT54/74FCT16373T/AT/CT/ET, 162373T/AT/CT/ET
FAST CMOS 16-BIT TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16373T/162373T
FCT16373AT/162373AT
Symbol
Parameter
tPLH Propagation Delay
tPHL xDx to xOx
tPLH Propagation Delay
tPHL xLE to xOx
tPZH Output Enable Time
tPZL
tPHZ Output Disable Time
tPLZ
tSU Set-up Time HIGH or LOW,
xDx to xLE
tH Hold Time HIGH or LOW,
xDx to xLE
tW xLE Pulse Width HIGH
tSK(o) Output Skew(3)
Condition(1)
CL = 50pF
RL = 500
Com'l.
Mil.
Com'l.
Mil.
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
1.5 8.0 1.5 8.5 1.5 5.2 1.5 5.6 ns
2.0 13.0 2.0 15.0 2.0 8.5 2.0 9.8 ns
1.5 12.0 1.5 13.5 1.5 6.5 1.5 7.5 ns
1.5 7.5 1.5 10.0 1.5 5.5 1.5 6.5 ns
2.0
2.0
2.0
2.0
— ns
1.5
1.5
1.5
1.5
— ns
6.0
6.0
5.0
6.0
— ns
0.5
0.5
0.5
0.5 ns
FCT16373CT/162373CT
FCT16373ET/162373ET
Symbol
Parameter
tPLH Propagation Delay
tPHL xDx to xOx
tPLH Propagation Delay
tPHL xLE to xOx
tPZH Output Enable Time
tPZL
tPHZ Output Disable Time
tPLZ
tSU Set-up Time HIGH or LOW,
xDx to xLE
tH Hold Time HIGH or LOW,
xDx to xLE
tW xLE Pulse Width HIGH
tSK(o) Output Skew(3)
Condition(1)
CL = 50pF
RL = 500
Com'l.
Mil.
Com'l.
Mil.
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
1.5 4.2 1.5 5.1 1.5 3.4
— ns
2.0 5.5 2.0 8.0 1.5 3.7
— ns
1.5 5.5 1.5 6.3 1.5 4.4
— ns
1.5 5.0 1.5 5.9 1.5 3.6
— ns
2.0
2.0
1.0
— ns
1.5
1.5
1.0
— ns
5.0
6.0
3.0(4)
— ns
0.5
0.5
0.5
— ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
2543 tbl 09
5.7
6

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