AD14160L データシートの表示（PDF） - Analog Devices

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AD14160L

Quad-SHARC® DSP Multiprocessor Family

Analog Devices 

1x

CLOCK

RESET

AD14160/AD14160L

AD14160/

AD14160L

CLKIN

RESET

RPBA

3

ID

ADDR31–0

DATA47–0

RD

WR

ACK

MS3–0

CONTROL

BMS

PAGE

SBTS

SW

ADRCLK

CS

HBR

HBG

REDY

SERIALS

LINKS

DISCRETES

CPA

BR2–6

5

BR1

ADSP-2106x #5

(OPTIONAL)

CLKIN

ADDR31–0

RESET

DATA47–0

RPBA

3

ID

CONTROL

ADDR

DATA

GLOBAL

MEMORY

OE

AND

WE PERIPHERALS

ACK (OPTIONAL)

CS

CS

ADDR

DATA

BOOT

EPROM

(OPTIONAL)

ADDR

HOST

PROCESSOR

INTERFACE

(OPTIONAL)

DATA

CPA

BR1, 2, 3, 4, 6

5

BR5

ADSP-2106x #6

(OPTIONAL)

CLKIN

RESET

ADDR31–0

DATA47–0

RPBA

3

ID

CONTROL

CPA

BR1–5 5

BR6

Figure 5. Optional System Interconnections

REV. A

–5–

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