INTEL387TMDX データシートの表示（PDF） - Intel

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INTEL387TMDX

Intel387™ DX MATH COPROCESSOR

Intel 

Intel387TM DX MATH COPROCESSOR

Instruction

FPREM FPREM1

(see Table 2 3)

Table 2 2 Condition Code Interpretation

C0 (S)

C3 (Z)

Three least significant bits

of quotient

Q2

Q0

C1 (A)

Q1

or O U

C2 (C)

Reduction

0 e complete

1 e incomplete

FCOM FCOMP

FCOMPP FTST

FUCOM FUCOMP

FUCOMPP FICOM

FICOMP

FXAM

FCHS FABS FXCH

FINCSTP FDECSTP

Constant loads

FXTRACT FLD

FILD FBLD

FSTP (ext real)

FIST FBSTP

FRNDINT FST

FSTP FADD FMUL

FDIV FDIVR

FSUB FSUBR

FSCALE FSQRT

FPATAN F2XM1

FYL2X FYL2XP1

FPTAN FSIN

FCOS FSINCOS

FLDENV FRSTOR

FLDCW FSTENV

FSTCW FSTSW

FCLEX FINIT

FSAVE

Result of comparison

(see Table 2 4)

Operand class

(see Table 2 5)

UNDEFINED

Zero

or O U

Sign

or O U

Zero

or O U

Operand is not

comparable

(Table 2 4)

Operand class

(Table 2 5)

UNDEFINED

UNDEFINED

Roundup

or O U

UNDEFINED

UNDEFINED

Roundup

or O U

undefined

if C2 e 1

Each bit loaded from memory

UNDEFINED

Reduction

0 e complete

1 e incomplete

OU

When both IE and SF bits of status word are set indicating a stack exception this bit

distinguishes between stack overflow (C1 e 1) and underflow (C1 e 0)

Reduction

If FPREM or FPREM1 produces a remainder that is less than the modulus reduction is

complete When reduction is incomplete the value at the top of the stack is a partial

remainder which can be used as input to further reduction For FPTAN FSIN FCOS and

FSINCOS the reduction bit is set if the operand at the top of the stack is too large In this

case the original operand remains at the top of the stack

Roundup

When the PE bit of the status word is set this bit indicates whether the last rounding in the

instruction was upward

UNDEFINED Do not rely on finding any specific value in these bits

10

10

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