INTEL387TMDX データシートの表示（PDF） - Intel

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INTEL387TMDX

Intel387™ DX MATH COPROCESSOR

Intel 

Intel387TM DX MATH COPROCESSOR

Pin

Name

CPUCLK2

NUMCLK2

CKM

RESETIN

PEREQ

BUSY

ERROR

D31 – D0

WR

ADS

READY

READYO

STEN

NPS1

NPS2

CMD0

VCC

VSS

Table 3 1 Intel387TM DX MCP Pin Summary

Function

Active

State

Input

Output

Intel386TM DX CPU CLocK 2

I

Intel387TM DX MCP CLocK 2

I

Intel387TM DX MCP CLocKing Mode

I

System reset

High

I

Processor Extension

REQuest

Busy status

Error status

High

O

Low

O

Low

O

Data pins

Write Read bus cycle

ADdress Strobe

Bus ready input

Ready output

High

IO

Hi Lo

I

Low

I

Low

I

Low

O

STatus ENable

MCP select 1

MCP select 2

CoMmanD

High

I

Low

I

High

I

Low

I

I

I

NOTE

STEN is referenced to only when getting the output pins into or out of tristate mode

Referenced

To

CPUCLK2

CPUCLK2 STEN

CPUCLK2 STEN

NUMCLK2 STEN

CPUCLK2

CPUCLK2

CPUCLK2

CPUCLK2

CPUCLK2 STEN

CPUCLK2

CPUCLK2

CPUCLK2

CPUCLK2

Table 3 2 Intel387TM DX MCP Pin Cross-Reference

ADS

BUSY

CKM

CPUCLK24

CMD0

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

D16

D17

K7

D18

K2

D19

J11

D20

K10

D21

L8

D22

H2

D23

H1

D24

G2

D25

G1

D26

D2

D27

D1

D28

C2

D29

C1

D30

B1

D31

A2

ERROR

B3

NPS1

A3

NPS2

A4

NUMCLK2

B5

PEREQ

A5

READY

B6

READYO

A7

RESETIN

B8

A8

STEN

B9

WR

B10

A10

VCC

B11

C10

D10

D11

E10

VSS

E11

G10

G11

H10

NO CONNECT

H11

TIE HIGH

L2

L6

K6

K11

K1

K8

L3

L10

Tie high pins may either be tied high with a pullup resistor or connected to VCC

L4

K4

A6 A9 B4

E1 F1 F10

J2 K5

L7

B2 B7 C11

E2 F2 F11

J1 J10 L5

K9

K3 L9

18

18

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