IP1000A データシートの表示（PDF） - Unspecified

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IP1000A

Gigabit Ethernet NIC Single Chip

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IP1000A LF

Preliminary Data Sheet

The Transmit Frame Descriptor (TFD) is a data structure containing fields specifying a pointer to another

TFD (the TFDNextPtr field), control information (the TFC0 field), and from one to 15 pointers to locations

within system memory containing the Ethernet frame data (the FragInfo fields). The TFD is used to

indicate to the IP1000A LF which blocks of system memory comprise the Ethernet frame data to be

transmitted. Each Ethernet frame is described by one and only one TFD.

2.2.3.2 Receive DMA

To utilize the IP1000A LF to receive data from a Gigabit Ethernet network, the received data must be

transferred from the IP1000A LF to the host’s system memory. The data bus utilized by IP1000A LF for

this data transfer is the PCI bus, and the method for transferring the data is DMA. The locations within

system memory reserved for the received data are indicated to IP1000A LF using Receive Frame

Descriptors.

The Receive Frame Descriptor (RFD) is a data structure containing fields specifying a pointer to another

RFD (the RFDNextPtr field), status information (the RFS field), and one pointer (the FragInfo field) to a

unique, contiguous block of system memory which is reserved for holding the received data. Typically,

one RFD will completely specify a single received Ethernet frame. While it is possible to use multiple

RFDs to describe a single Ethernet frame, it is not possible to describe multiple Ethernet frames with a

single RFD.

2.2.4 Interrupts

The IP1000A LF generates host system processor interrupts via the PCI bus based on events related to

transmit and receive DMA operation. It is the responsibility of the host system to detect these interrupts,

identify the corresponding condition which caused the interrupt, and take the appropriate action.

At gigabit per second data rates, interrupts related to Gigabit Ethernet frame transmission and reception

can quickly overwhelm a host system processor. The IP1000A LF incorporates several features for

minimizing the number of interrupts generated. These features should be carefully understood and

utilized to achieve maximum system performance in Gigabit Ethernet networks.

2.2.4.1 Transmit DMA Interrupts

Interrupts can be generated by the IP1000A LF based on a number of events related to transmit DMA

operation:

TxDMAComplete interrupt is issued after successful transfer of an Ethernet frame to the IP1000A LF

via transmit DMA with the TxDMAIndicate bit in the TFD’s TFC0 field is a logic 1. Use of this interrupt

is not recommended due to the frequency of transmit DMA operations in a Gigabit Ethernet network.

TxComplete interrupt (frame transmission complete without error) is issued after successful

transmission of an Ethernet frame which has already been transferred to the IP1000A LF with the

TxIndicate bit in the TFD’s TFC0 field is a logic 1. A recommended use of this feature is to avoid

setting the TxIndicate bit in every TFD, but instead only set the TxIndicate bit in the last TFD of a

TFDList, or in every Nth frame (where N>1).

TxComplete interrupt (frame transmission encountered an error) is issued if an error occurs during

transmission of an Ethernet frame which has already been transferred to the IP1000A LF

independent of the TxIndicate bit setting in the TFD’s TFC0 field. When an error occurs, the transmit

MAC of the IP1000A LF is disabled (and must be re-enabled to resume operation). Transmit DMA

operation continues in spite of transmit errors except for the case of a transmit underrun error

(indicated by the TxUnderrun bit in the TxStatus register). To resume transmit DMA operation after a

transmit underrun error, the transmit DMA, transmit FIFO, and transmit MAC functions within

IP1000A LF must be reset.

Copyright © 2005, IC Plus Corp.

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July 5, 2005

IP1000A LF-DS-R08

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