INTEL386 データシートの表示（PDF） - Intel

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INTEL386

Intel386 SX MICROPROCESSOR

Intel 

Intel386TM SX MICROPROCESSOR

Each of the tables has a register associated with it

GDTR LDTR and IDTR see Figure 2 1 The LGDT

LLDT and LIDT instructions load the base and limit

of the Global Local and Interrupt Descriptor Tables

into the appropriate register The SGDT SLDT and

SIDT store the base and limit values These are priv-

ileged instructions

Global Descriptor Table

The Global Descriptor Table (GDT) contains de-

scriptors which are available to all of the tasks in a

system The GDT can contain any type of segment

descriptor except for interrupt and trap descriptors

Every Intel386 SX CPU system contains a GDT

The first slot of the Global Descriptor Table corre-

sponds to the null selector and is not used The null

selector defines a null pointer value

Unlike the 6-byte GDT or IDT registers which contain

a base address and limit the visible portion of the

LDT register contains only a 16-bit selector This se-

lector refers to a Local Descriptor Table descriptor in

the GDT (see figure 2 1)

Interrupt Descriptor Table

The third table needed for Intel386 SX Microproces-

sor systems is the Interrupt Descriptor Table The

IDT contains the descriptors which point to the loca-

tion of the up to 256 interrupt service routines The

IDT may contain only task gates interrupt gates and

trap gates The IDT should be at least 256 bytes in

size in order to hold the descriptors for the 32 Intel

Reserved Interrupts Every interrupt used by a sys-

tem must have an entry in the IDT The IDT entries

are referenced by INT instructions external interrupt

vectors and exceptions

Local Descriptor Table

LDTs contain descriptors which are associated with

a given task Generally operating systems are de-

signed so that each task has a separate LDT The

LDT may contain only code data stack task gate

and call gate descriptors LDTs provide a mecha-

nism for isolating a given task’s code and data seg-

ments from the rest of the operating system while

the GDT contains descriptors for segments which

are common to all tasks A segment cannot be ac-

cessed by a task if its segment descriptor does not

exist in either the current LDT or the GDT This pro-

vides both isolation and protection for a task’s seg-

ments while still allowing global data to be shared

among tasks

DESCRIPTORS

The object to which the segment selector points to

is called a descriptor Descriptors are eight byte

quantities which contain attributes about a given re-

gion of linear address space These attributes in-

clude the 32-bit base linear address of the segment

the 20-bit length and granularity of the segment the

protection level read write or execute privileges

the default size of the operands (16-bit or 32-bit)

and the type of segment All of the attribute informa-

tion about a segment is contained in 12 bits in the

segment descriptor Figure 4 4 shows the general

format of a descriptor All segments on the Intel386

SX Microprocessor have three attribute fields in

common the P bit the DPL bit and the S bit The P

31

SEGMENT BASE 15 0

SEGMENT LIMIT 15 0

BASE 31

24

G

D

0

AVL

LIMIT

19 16

P

DPL

S

TYPE

0 BYTE

ADDRESS

0

A

BASE

23 16

a4

BASE

LIMIT

P

DPL

S

TYPE

A

G

D

0

AVL

Base Address of the segment

The length of the segment

Present Bit 1ePresent 0eNot Present

Descriptor Privilege Level 0 – 3

Segment Descriptor 0eSystem Descriptor 1eCode or Data Segment Descriptor

Type of Segment

Accessed Bit

Granularity Bit 1eSegment length is page granular 0eSegment length is byte granular

Default Operation Size (recognized in code segment descriptors only) 1e32-bit segment 0e16-bit segment

Bit must be zero (0) for compatibility with future processors

Available field for user or OS

Figure 4 4 Segment Descriptors

26

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