ST93C66 データシートの表示（PDF） - STMicroelectronics

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ST93C66

4K (256 X 16 OR 512 X 8) SERIAL MICROWIRE EEPROM

STMicroelectronics 

Figure 6. READ, WRITE, EWEN, EWDS Sequences

ST93C66, ST93C67

READ

S

D

Q

WRITE

S

D

Q

ERASE

S

WRITE

ENABLE

D

1 1 0 An A0

Qn

Q0

ADDR

OP

CODE

DATA OUT

1 0 1 An A0 Dn

CHECK

STATUS

D0

ADDR

OP

CODE

1 0 0 1 1 Xn X0

OP

CODE

DATA IN

BUSY

READY

ERASE S

WRITE

DISABLE

D

1 0 0 0 0 Xn X0

OP

CODE

AI00878C

Notes: 1. An: n = 7 for x16 org. and 8 for x8 org.

2. Xn: n = 5 for x16 org. and 6 for x8 org.

When the write cycle is completed, the Ready

signal (Q = 1) will indicate (if S is driven high) that

the ST93C66 is ready to receive a new instruction.

Programming is internally self-timed (the external

clock signal on C input may be disconnected or left

running after the start of a programming cycle) and

does not require an Erase instruction prior to the

Write instruction (The Write instruction includes an

automatic erase cycle before programing data).

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