IRFI4019H-117P データシートの表示（PDF） - International Rectifier
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IRFI4019H-117P Datasheet PDF : 7 Pages
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0.5
ID = 5.2A
0.4
0.3
0.2
0.1
0.0
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TJ = 125°C
TJ = 25°C
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VGS, Gate-to-Source Voltage (V)
Fig 12. On-Resistance Vs. Gate Voltage
IRFI4019H-117P
350
ID
300
TOP
0.91A
1.1A
250
BOTTOM 5.2A
200
150
100
50
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 13. Maximum Avalanche Energy Vs. Drain Current
D.U.T
+
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
+
-
RG
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
D.U.T. ISD Waveform
Reverse
- +
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform Diode Recovery
dv/dt
*
• dv/dt controlled by RG
• Driver same type as D.U.T.
VDD
Re-Applied
** + Voltage
Body Diode Forward Drop
• ISD controlled by Duty Factor "D"
-
Inductor Curent
• D.U.T. - Device Under Test
Ripple ≤ 5%
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel
*** VGS = 5V for Logic Level Devices
V*G*S*=10V
VDD
ISD
Fig 14. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs
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