IRS21303D データシートの表示（PDF） - International Rectifier
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IRS21303D Datasheet PDF : 23 Pages
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IRS2130D/IRS21303D/IRS2132D (J&S)PbF
PRELIMINARY
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the
recommended conditions. All voltage parameters are absolute voltage referenced to VSO. The VS offset rating is tested
with all supplies biased at a 15 V differential.
Symbol
VB1,2,3
VS1,2,3
VHO1,2,3
VCC
VSS
VLO1,2,3
VIN
VFLT
VCAO
VCA-
TA
Definition
High side floating supply voltage
High side floating offset voltage
IRS213(0,2)D
IRS21303D
High side floating output voltage
Low side and logic fixed supply voltage
Logic ground
IRS213(0,2)D
IRS21303D
Low side output voltage
Logic input voltage (HIN1,2,3, LIN1,2,3 & ITRIP)
FAULT output voltage
Operational amplifier output voltage
Operational amplifier inverting input voltage
Ambient temperature
Min.
VS1,2,3 +10
VS1,2,3 +13
Note 1
VS1,2,3
10
13
-5
0
VSS
VSS
VSS
VSS
-40
Max.
VS1,2,3 +20
600
VB1,2,3
20
5
VCC
VSS + 5
VCC
VSS + 5
VSS + 5
125
Units
V
°C
Note 1: Logic operational for VS of (VSO - 8 V) to (VSO + 600 V). Logic state held for VS of (VSO - 8 V) to (VSO – VBS).
(Please refer to the Design Tip DT97-3 for more details).
Note 2: The CAO pin and all input pins (except CA-) are internally clamped with a 5.2 V zener diode.
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