IS24C02D データシートの表示（PDF） - Integrated Silicon Solution
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IS24C02D Datasheet PDF : 18 Pages
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IS24C02D
PIN CONFIGURATION
8-Pin SOIC and TSSOP
A0 1
A1 2
A2 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
PIN DESCRIPTIONS
A0-A2
SDA
SCL
WP
Vcc
Address Inputs
Serial Address/Data I/O
Serial Clock Input
Write Protect Input
Power Supply
GND Ground
SCL
This input clock pin is used to synchronize the data transfer
to and from the device.
SDA
The SDA is a Bi-directional pin used to transfer addresses
and data into and out of the device. The SDA pin is an
open drain output and can be wire Or'ed with other open
drain or open collector outputs. The SDA bus requires a
pullup resistor to Vcc.
A0, A1, A2
The A0, A1, and A2 are the device address inputs that
are hardwired or left unconnected for hardware flexibility.
When pins are hardwired, as many as eight devices may
be addressed on a single bus system. When the pins are
not hardwired, the default values of A0, A1, and A2 are
zero.
WP
WP is the Write Protect pin. If the WP pin is tied to Vcc, the
entire array becomes Write Protected, and software write-
protection cannot be initiated. When WP is tied to GND or
left floating, normal read/write operations are allowed to the
device.If the device has already received a write-protection
command, the memory in the range of 00h-7Fh is read
-only regardless of the setting of the WP pin.
DEVICE OPERATION
The IS24C02D features a serial communication and
supports a bi-directional 2-wire bus transmission protocol
called I2CTM.
2-WIRE BUS
The two-wire bus is defined as a Serial Data line (SDA), and
a Serial Clock line (SCL). The protocol defines any device
that sends data onto the SDA bus as a transmitter, and
the receiving device as a receiver. The bus is controlled by
Master device which generates the SCL, controls the bus
access and generates the Stop and Start conditions. The
IS24C02D is the Slave device on the bus.
Integrated Silicon Solution, Inc. — www.issi.com
5
Rev. 00A
07/27/09
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