IS24C32C データシートの表示（PDF） - Integrated Silicon Solution

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IS24C32C

32K-bit 2-WIRE SERIAL CMOS EEPROM

Integrated Silicon Solution 

IS24C32C

PIN CONFIGURATION

8-Pin DIP, SOIC, TSSOP, and MSOP

A0 1

A1 2

A2 3

GND 4

8 VCC

7 WP

6 SCL

5 SDA

8-pad DFN

A0 1

A1 2

A2 3

GND 4

8 VCC

7 WP

6 SCL

5 SDA

(Top View)

PIN DESCRIPTIONS

A0-A2

SDA

SCL

WP

Vcc

GND

Address Inputs

Serial Address/Data I/O

Serial Clock Input

Write Protect Input

Power Supply

Ground

SCL

This input clock pin is used to synchronize the data

transfer to and from the device.

SDA

The SDA is a Bi-directional pin used to transfer addresses

and data into and out of the device. The SDA pin is an open

drain output and can be wire-Ored with other open drain

or open collector outputs. The SDA bus requires a pullup

resistor to Vcc.

A0, A1, A2

The A0, A1 and A2 are the device address inputs that are

hardwired or left not connected for hardware compatibility

with the 24C16. When pins are hardwired, as many as eight

32K devices may be addressed on a single bus system.

When the pins are not hardwired, the default values of A0,

A1, and A2 are zero.

WP

WP is the Write Protect pin. The input level determines if all

or none of the array is protected from modifications.

Write Protection

Array Addresses Protected

WP

GND or floating

Vcc

IS24C32C

None

Entire Array

Integrated Silicon Solution, Inc.

3

Rev. B

1/04/08

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