IS24C32C データシートの表示（PDF） - Integrated Silicon Solution

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IS24C32C

32K-bit 2-WIRE SERIAL CMOS EEPROM

Integrated Silicon Solution 

IS24C32C

Figure 1. Typical System Bus Configuration

SDA

SCL

Vcc

Master

Transmitter/

Receiver

IS24CXX

Figure 2. Output Acknowledge

SCL from

Master

1

Data Output

from

Transmitter

Data Output

from

Receiver

Figure 3. START and STOP Conditions

SCL

SDA

8

9

tAA

tAA

ACK

Integrated Silicon Solution, Inc.

7

Rev. B

1/04/08

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