IS23SC4442 データシートの表示（PDF） - Integrated Silicon Solution

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IS23SC4442

256 BYTE EEPROM WITH WRITE PROTECT FUNCTION AND PROGRAMMABLE SECURITY

Integrated Silicon Solution 

IS23SC4442

ISSI®

256 BYTE EEPROM

WITH WRITE PROTECT FUNCTION AND

PROGRAMMABLE SECURITY

PRELIMINARY INFORMATION

August 2003

FEATURES

• Standard CMOS process

• 256 x 8 bits EEPROM organization

• Byte-wise addressing

• Irreversible byte-wise write protection of lowest

32 address (Byte 0..31)

• 3-byte Programmable Security Code (PSC) for

memory write/erase protection

• 2.7-5.5V power supply for read and write/erase

• Low power operation: 3 mA typical active current

• 2.5 ms programming time

• 2-wire serial interface

• End of processing indication

• ISO standard 7816 compatible

• High reliability:

– 1,000,000 erase/write cycles guaranteed

– 10 years data retention

• Wide operating temperature range

–30oC to 75oC

DESCRIPTION

IS23SC4442 contains 256 x 8 bits of EEPROM main

memory and a 32 x 1 bit protection PROM memory.

The main memory can be randomly accessed byte by

byte. During memory erase, all 8 bits of a byte are set

to logical one. During memory write, individual bit(s)

are set to logical zeros depend on the data value to be

written. Normally, a data change may consists of an

erase and a write operation. The write or erase operation

takes at least 2.5 ms to complete.

The first 32 bytes (Address: 0 to 31) in memory are

irreversibly protected by the corresponding 32 protect

bits in the 32 x 1 bit protection memory. The 32 protect

bits are onetime programmable, and they cannot be

erased once they are set to logical zero.

IS23SC4442 provides a 3-bit Error Counter (EC), and

three bytes Programmable Security Code (PSC) to

prevent unauthorized erase/write operation to the

memory. All the memory, except the PSC, can be read

after the chip is powered on. But, the memory can be

written or erased only after the PSC is entered and

verified correct. After three successive unsuccessful

verifications of PSC, the Error Counter locks the chip

from a further attempt, and the memory can never be

erased or written.

Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any

published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

1

Rev. 00B

08/01/03

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