IS41C16256
IS41LV16256
ISSI ®
TRUTH TABLE
Function
RAS LCAS UCAS WE OE Address tR/tC I/O
Standby
H
H
H
X
X
X
High-Z
Read: Word
L
L
L
H
L
ROW/COL DOUT
Read: Lower Byte
L
L
H
H
L
ROW/COL Lower Byte, DOUT
Upper Byte, High-Z
Read: Upper Byte
L
H
L
H
L ROW/COL Lower Byte, High-Z
Upper Byte, DOUT
Write: Word (Early Write)
L
L
L
L
X ROW/COL DIN
Write: Lower Byte (Early Write)
L
L
H
L
X ROW/COL Lower Byte, DIN
Upper Byte, High-Z
Write: Upper Byte (Early Write)
L
H
L
L
X ROW/COL Lower Byte, High-Z
Upper Byte, DIN
Read-Write(1,2)
L
L
L H→L L→H ROW/COL DOUT, DIN
EDO Page-Mode Read(2) 1st Cycle: L
2nd Cycle: L
Any Cycle: L
H→L H→L H
H→L H→L H
L→H L→H H
L
ROW/COL DOUT
L
NA/COL
DOUT
L
NA/NA
DOUT
EDO Page-Mode Write(1) 1st Cycle: L
2nd Cycle: L
H→L H→L L
H→L H→L L
X ROW/COL DIN
X
NA/COL DIN
EDO Page-Mode
Read-Write(1,2)
1st Cycle: L
2nd Cycle: L
H→L H→L H→L L→H ROW/COL
H→L H→L H→L L→H NA/COL
DOUT, DIN
DOUT, DIN
Hidden Refresh2)
RAS-Only Refresh
Read L→H→L L
L
H
L
ROW/COL DOUT
Write L→H→L L
L
L
X
ROW/COL DOUT
L
H
H
X
X
ROW/NA High-Z
CBR Refresh(3)
H→L
L
L
X
X
X
High-Z
Notes:
1. These WRITE cycles may also be BYTE WRITE cycles (either LCAS or UCAS active).
2. These READ cycles may also be BYTE READ cycles (either LCAS or UCAS active).
3. At least one of the two CAS signals must be active (LCAS or UCAS).
Integrated Silicon Solution, Inc. — 1-800-379-4774
3
Rev. J
06/29/00