IS25C16B データシートの表示（PDF） - Integrated Silicon Solution

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IS25C16B

16K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM

Integrated Silicon Solution 

IS25C16B

SERIAL INTERFACE DESCRIPTION

MASTER: The device that provides a clock signal.

SLAVE: The IS25C16B is a slave because the clock

signal is an input.

TRANSMITTER/RECEIVER: The IS25C16B has both

data input (SI) and data output (SO).

MSB: The most significant bit. It is always the first bit

transmitted or received.

OP-CODE: The first byte transmitted to the slave fol-

lowing CS transition to LOW. If the OP-CODE is a valid

member of the IS25C16B instruction set (Table 3), then

it is decoded appropriately. If the OP-CODE is not valid,

and the SO pin remains in high impedance.

Block Diagram

STATUS

REGISTER

VCC

GND

2048 x 8

MEMORY ARRAY

DATA

REGISTER

SI

ADDRESS

DECODER

OUTPUT

BUFFER

MODE

CS

DECODE

LOGIC

WP

SCK

CLOCK

Integrated Silicon Solution, Inc.

Preliminary Information  Rev.  00A

08/28/09

HOLD

SO

3

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