IS93C56A(2006) データシートの表示（PDF） - Integrated Silicon Solution

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IS93C56A
(Rev.:2006)

2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM

Integrated Silicon Solution 

IS93C56A

IS93C66A

AC WAVEFORMS

FIGURE 2. SYNCHRONOUS DATA TIMING

CS

tCSS

SK

DIN

DOUT

(READ)

DOUT

(WRITE)

(WRALL)

(ERASE)

(ERAL)

tSKH

tDIS

tDIH

tPD0

tSV

T

tSKL

STATUS VALID

tCSH

tPD1

ISSI ®

tDF

tDF

FIGURE 3. READ CYCLE TIMING

tCS

CS

DIN

1

1 0 An

A0

DOUT

0 Dm

D0 *

*Address Pointer Cycles to the Next Register

Notes:

To determine address bits An-A0 and data bits Dm-Do, see Instruction Set for the specific device.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

9

Rev. A

05/02/06

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