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ISL6292B データシートの表示(PDF) - Intersil

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ISL6292B Datasheet PDF : 12 Pages
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ISL6292B
Board Layout Recommendations
The ISL6292B is targeted for space-limited applications. In
order to maximize the current capability, it is very important
that the exposed pad under the package is properly soldered
to the board and is connected to other layers through
thermal vias. More thermal vias and more copper attached to
the exposed pad usually result in better thermal
performance. On the other hand, the number of vias is
limited by the size of the pad. The exposed pads for the 4x4
QFN package are able to have 5 vias. As much copper as
possible should be connected to the exposed pad to
minimize the thermal impedance. Refer to the ISL6292B
evaluation board for layout examples.
11
FN9139 .1
April 19, 2005

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