ISL6402A データシートの表示（PDF） - Intersil

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ISL6402A

1.4MHz Dual, 180° Out-of-Phase, StepDown PWM and Single Linear Controller

Intersil 

Block Diagram

SGND VCC_5V

VIN

SYNC

PGOOD

FB3

GATE3

LDO &

SS1

SS1

POWER-ON

SS2

RESET (POR)

SS2

POR +5V

RAMP

BOOT1

UGATE1

PHASE1

HGDR

VCC_5V

HI

GATE LOGIC

PWM1

SHUTDOWN SD1

LGATE1

PGND

LGDR

LO

PWM

SD1

FB1

OCSET1

-

REF

ISEN1

-

-

OC

COMP

∑

CLOCK

CLK

FB1

OUTPUT

VOLTAGE

FB2

MONITOR

FB3

LINEAR

CONTROLLER

REF

HI

GATE LOGIC

PWM2

SD2 SHUTDOWN

HGDR

BOOT2

UGATE2

PHASE2

VCC_5V

PWM

LGDR

LO

LGATE2

OC SS1

LOGIC

SS2 OC

LOGIC

-

SQ

CLK

R

PWM1

LATCH

QS

-

CLK

R

PWM2

LATCH

-

OC

COMP

∑

SD2

-

REF

FB2

OCSET2

ISEN2

-

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