HTRC11001T データシートの表示（PDF） - Philips Electronics

部品番号

コンポーネント説明

メーカー

HTRC11001T

HITAG reader chip

Philips Electronics 

Philips Semiconductors

HITAG reader chip

Product specification

HTRC11001T

BIT NAME VALUE

DESCRIPTION

PD_MODE

select Power-down mode

0 Idle mode

1 Power-down mode

FREEZE1,

FREEZE0

facility to achieve fast settling times (MSB and LSB)

00 normal operation

01 main low-pass is frozen; main high-pass is pre-charged to level on pin QGND

10 main low-pass is frozen; time constant of main high-pass is reduced by a

factor of 16 for bit FILTERH = 0 and by a factor of 8 for bit FILTERH = 1

11 main high-pass time constant is reduced by a factor of 16 for bit FILTERH = 0

and by a factor of 8 for bit FILTERH = 1; second high-pass is pre-charged

ACQAMP

store signal amplitude (see also bit AMPCOMP in Table 5)

0 set status bit AMPCOMP when the actual data signal amplitude is higher than

the stored reference

1 store actual amplitude of the data signal as reference for later amplitude

comparison

THRESET

reset threshold generation of digitizer

0 no reset

1 reset

FSEL1, FSEL0

clock frequency selection (MSB and LSB)

00 4 MHz

01 8 MHz

10 12 MHz

11 16 MHz

DISSMART-

COMP

disable smart comparator

0 smart comparator: on

1 smart comparator: off

DISLP1

disable low-pass 1

0 low-pass: on

1 low-pass: off

INITIAL

VALUE

0

00

0

0

00

0

0

2001 Nov 23

11

Share Link: