ISL8036 データシートの表示（PDF） - Intersil
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ISL8036 Datasheet PDF : 25 Pages
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ISL8036, ISL8036A
Electrical Specifications Unless otherwise noted, the typical specifications are measured at the following conditions:
TA = -40°C to +85°C, VIN = 3.6V, EN1 = EN2 = VDD, L = 1.5µH, C1 = C2 = C4 = 2x22µF,
IOUT1 = IOUT2 = 0A to 3A, unless otherwise noted. Typical values are at TA = +25°C. Boldface
limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6) UNITS
Negative Peak Overcurrent Limit
LX1, LX2
Inoc1
Inoc2
-3.5 -2.5 -1.5
A
-3.5 -2.5 -1.5
A
P-Channel MOSFET ON-Resistance
N-Channel MOSFET ON-Resistance
LX_ Maximum Duty Cycle
VIN = 6V, IO = 200mA
VIN = 2.7V, IO = 200mA
VIN = 6V, IO = 200mA
VIN = 2.7V, IO = 200mA
50
75
mΩ
70 100
mΩ
50
75
mΩ
70 100
mΩ
100
%
PWM Switching Frequency
FS
ISL8036
ISL8036A
0.88 1.1 1.32
2.15 2.5 2.85
MHz
MHz
Synchronization Frequency Range
Channel 1 to Channel 2 Phase Shift
FSYNC
ISL8036 (Note 7)
Rising edge to rising edge timing
2.64
6
180
MHz
°
LX Minimum On Time
SYNC = High ( PWM mode)
140
ns
Soft Discharge Resistance
LX Leakage Current
RDIS
EN = LOW
Pulled up to 6V
80 100 120
Ω
0.1
1
µA
PG1, PG2
Output Low Voltage
Sinking 1mA, VFB = 0.7V
0.3
V
PG Pin Leakage Current
Internal PGOOD Low Rising
Threshold
PG = VIN = 6V
0.01 0.1
µA
Percentage of nominal regulation voltage 89.5 92 94.5
%
Internal PGOOD Low Falling
Threshold
Percentage of nominal regulation voltage 85
88
91
%
Delay Time (Rising Edge)
Time from VOUT_ reached regulation
1
ms
Internal PGOOD Delay Time
(Falling Edge)
7
10
µs
EN1, EN2, SYNC
Logic Input Low
0.4
V
Logic Input High
1.5
V
SYNC Logic Input Leakage Current
Enable Logic Input Leakage
Current
ISYNC
IEN
Pulled up to 6V
Pulled up to 6V
0.1
1
µA
0.1
1
µA
Thermal Shutdown
150
°C
Thermal Shutdown Hysteresis
25
°C
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
7. The operational frequency per switching channel will be half of the SYNC frequency.
9
FN6853.1
October 18, 2010
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